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author | Peng Fan <peng.fan@nxp.com> | 2017-02-22 16:21:42 +0800 |
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committer | Ye Li <ye.li@nxp.com> | 2017-04-05 17:23:51 +0800 |
commit | 626c8a6df5bea994aa821bb3a318a99634a4fbcc (patch) | |
tree | 3ad21d95e2767e0ef106ccf50d1f15c0d9a45f3e /arch/arm/include/asm/arch-mx7ulp/clock.h | |
parent | e605114f27c7642e1ef6b0faa8eebab50812df5e (diff) | |
download | u-boot-imx-626c8a6df5bea994aa821bb3a318a99634a4fbcc.zip u-boot-imx-626c8a6df5bea994aa821bb3a318a99634a4fbcc.tar.gz u-boot-imx-626c8a6df5bea994aa821bb3a318a99634a4fbcc.tar.bz2 |
imx: mx7ulp: Add clock framework and functions
Add a clock framework to support SCG1/PCC2/PCC3 for A7 to support get/set
clock source, divider, clock rate and parent source.
Users need to include pcc.h to use the APIs to for peripherals clock. Each
peripheral clock is defined in enum pcc_clk type.
SCG relevants APIs are defined in scg.h which supports clock rate get, PLL/PFD
enablement and settings, and all SCG clock initialization. User need use enum
scg_clk to access each clock source.
In clock.c, we initialize necessary clocks at u-boot s_init and implement the
clock functions used by driver modules to operate clocks dynamically.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/include/asm/arch-mx7ulp/clock.h')
-rw-r--r-- | arch/arm/include/asm/arch-mx7ulp/clock.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx7ulp/clock.h b/arch/arm/include/asm/arch-mx7ulp/clock.h new file mode 100644 index 0000000..f21052e --- /dev/null +++ b/arch/arm/include/asm/arch-mx7ulp/clock.h @@ -0,0 +1,38 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _ASM_ARCH_CLOCK_H +#define _ASM_ARCH_CLOCK_H + +#include <common.h> +#include <asm/arch/pcc.h> +#include <asm/arch/scg.h> + +/* Mainly for compatible to imx common code. */ +enum mxc_clock { + MXC_ARM_CLK = 0, + MXC_AHB_CLK, + MXC_IPG_CLK, + MXC_UART_CLK, + MXC_CSPI_CLK, + MXC_AXI_CLK, + MXC_DDR_CLK, + MXC_ESDHC_CLK, + MXC_ESDHC2_CLK, + MXC_I2C_CLK, +}; + +u32 mxc_get_clock(enum mxc_clock clk); +u32 get_lpuart_clk(void); +#ifdef CONFIG_MXC_OCOTP +void enable_ocotp_clk(unsigned char enable); +#endif +#ifdef CONFIG_USB_EHCI +void enable_usboh3_clk(unsigned char enable); +#endif +void init_clk_usdhc(u32 index); +void clock_init(void); +#endif |