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author | Tom Rini <trini@konsulko.com> | 2016-11-30 09:57:52 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2016-11-30 09:57:52 -0500 |
commit | 4d6647ab17ab9d33c60f7a9f07576c5fbdf6336f (patch) | |
tree | e3bde11276fcf8ce1c02d797a71fa23d974c66f3 /arch/arm/include/asm/arch-mx6/mx6-ddr.h | |
parent | 6b29a395b62965eef6b5065d3a526a8588a92038 (diff) | |
parent | 4db4d42ee290a8cad00b358b2e7ef6a00483893b (diff) | |
download | u-boot-imx-4d6647ab17ab9d33c60f7a9f07576c5fbdf6336f.zip u-boot-imx-4d6647ab17ab9d33c60f7a9f07576c5fbdf6336f.tar.gz u-boot-imx-4d6647ab17ab9d33c60f7a9f07576c5fbdf6336f.tar.bz2 |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Diffstat (limited to 'arch/arm/include/asm/arch-mx6/mx6-ddr.h')
-rw-r--r-- | arch/arm/include/asm/arch-mx6/mx6-ddr.h | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h b/arch/arm/include/asm/arch-mx6/mx6-ddr.h index 9922409..2a8d443 100644 --- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h +++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h @@ -458,9 +458,11 @@ void mx6sl_dram_iocfg(unsigned width, const struct mx6sl_iomux_ddr_regs *, const struct mx6sl_iomux_grp_regs *); -#if defined(CONFIG_MX6QDL) || defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) -int mmdc_do_write_level_calibration(void); -int mmdc_do_dqs_calibration(void); +#if defined(CONFIG_MX6_DDRCAL) +int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo); +int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo); +void mmdc_read_calibration(struct mx6_ddr_sysinfo const *sysinfo, + struct mx6_mmdc_calibration *calib); #endif /* configure mx6 mmdc registers */ @@ -495,6 +497,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *, #define MX6_MMDC_P0_MPDGCTRL1 0x021b0840 #define MX6_MMDC_P0_MPRDDLCTL 0x021b0848 #define MX6_MMDC_P0_MPWRDLCTL 0x021b0850 +#define MX6_MMDC_P0_MPZQLP2CTL 0x021b085C #define MX6_MMDC_P0_MPMUR0 0x021b08b8 #define MX6_MMDC_P1_MDCTL 0x021b4000 @@ -522,6 +525,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *, #define MX6_MMDC_P1_MPDGCTRL1 0x021b4840 #define MX6_MMDC_P1_MPRDDLCTL 0x021b4848 #define MX6_MMDC_P1_MPWRDLCTL 0x021b4850 +#define MX6_MMDC_P1_MPZQLP2CTL 0x021b485C #define MX6_MMDC_P1_MPMUR0 0x021b48b8 #endif /*__ASM_ARCH_MX6_DDR_H__ */ |