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| author | Peng Fan <van.freenix@gmail.com> | 2016-08-11 14:02:51 +0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2016-10-04 15:41:01 +0200 |
| commit | 07e1c0ae83faff57477392be87734128db5e1b14 (patch) | |
| tree | 84d433be88cbd55b97ca541a199eed599ea57435 /arch/arm/include/asm/arch-mx6/imx-regs.h | |
| parent | 5b66482d44b4e9571c64285254a43bdfe9ed1262 (diff) | |
| download | u-boot-imx-07e1c0ae83faff57477392be87734128db5e1b14.zip u-boot-imx-07e1c0ae83faff57477392be87734128db5e1b14.tar.gz u-boot-imx-07e1c0ae83faff57477392be87734128db5e1b14.tar.bz2 | |
imx: iomux: fix snvs usage for i.MX6ULL
SNVS TAMPER pin and BOOT MODE pins are in SNVS IOMUXC module,
not in IOMUXC, so correct the related registers' offset.
Use IOMUX_CONFIG_LPSR flag for these pins, so we can differentiate
them from iomuxc pins.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: "Benoît Thébaudeau" <benoit.thebaudeau.dev@gmail.com>
Diffstat (limited to 'arch/arm/include/asm/arch-mx6/imx-regs.h')
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 3bcb1a8..8bb36eb 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -182,6 +182,7 @@ #define GPIO3_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x24000) #define GPIO4_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x28000) #define GPIO5_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x2C000) +#define MX6UL_SNVS_LP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x30000) #define GPIO6_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x30000) #define GPIO7_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x34000) #define KPP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x38000) |