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| author | Fabio Estevam <festevam@gmail.com> | 2011-04-11 16:18:12 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-04-27 19:38:05 +0200 |
| commit | 4adaf9bf097b57af12f9a598759f8c9990e3502e (patch) | |
| tree | 9eda09c8de62724cbefee35ba40922459528b369 /arch/arm/include/asm/arch-mx31/imx-regs.h | |
| parent | 862711154339be2af723adcbde217743de781e81 (diff) | |
| download | u-boot-imx-4adaf9bf097b57af12f9a598759f8c9990e3502e.zip u-boot-imx-4adaf9bf097b57af12f9a598759f8c9990e3502e.tar.gz u-boot-imx-4adaf9bf097b57af12f9a598759f8c9990e3502e.tar.bz2 | |
ARM: mx31: Print the silicon version
Use the same method of the Linux kernel to print the MX31 silicon version on
boot.
Tested on a MX31PDK with a 2.0 silicon, where it shows:
CPU: Freescale i.MX31 rev 2.0 at 531 MHz
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Diffstat (limited to 'arch/arm/include/asm/arch-mx31/imx-regs.h')
| -rw-r--r-- | arch/arm/include/asm/arch-mx31/imx-regs.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h index 37337f2..0eeaf39 100644 --- a/arch/arm/include/asm/arch-mx31/imx-regs.h +++ b/arch/arm/include/asm/arch-mx31/imx-regs.h @@ -84,6 +84,29 @@ struct wdog_regs { u16 wrsr; /* Reset Status */ }; +/* IIM Control Registers */ +struct iim_regs { + u32 iim_stat; + u32 iim_statm; + u32 iim_err; + u32 iim_emask; + u32 iim_fctl; + u32 iim_ua; + u32 iim_la; + u32 iim_sdat; + u32 iim_prev; + u32 iim_srev; + u32 iim_prog_p; + u32 iim_scs0; + u32 iim_scs1; + u32 iim_scs2; + u32 iim_scs3; +}; + +struct mx3_cpu_type { + u8 srev; + const char *v; +}; #define IOMUX_PADNUM_MASK 0x1ff #define IOMUX_PIN(gpionum, padnum) ((padnum) & IOMUX_PADNUM_MASK) @@ -480,6 +503,8 @@ enum iomux_pins { #define CCMR_FPM (1 << 1) #define CCMR_CKIH (2 << 1) +#define MX31_IIM_BASE_ADDR 0x5001C000 + #define PDR0_CSI_PODF(x) (((x) & 0x1ff) << 23) #define PDR0_PER_PODF(x) (((x) & 0x1f) << 16) #define PDR0_HSP_PODF(x) (((x) & 0x7) << 11) |