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authorTang Yuantian <Yuantian.Tang@freescale.com>2014-10-09 16:11:37 +0800
committerYork Sun <yorksun@freescale.com>2014-11-19 12:56:14 -0800
commitd8222dbe42e17c49c2f904400c711ef58e3e06d8 (patch)
tree1405d33e76a354f66c51848a3b6da10454ab30a2 /arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
parenteaa859e7d23172acb68b3096beb083ba2e42d6c3 (diff)
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arm: ls102xa: Fixed a register definition error
There are 8 SCFG_SPARECR registers in SCFG memory block, not one. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h')
-rw-r--r--arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index 7995fe2..b5db720 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -182,7 +182,7 @@ struct ccsr_scfg {
u32 etsecmcr;
u32 sdhciovserlcr;
u32 resv14[61];
- u32 sparecr;
+ u32 sparecr[8];
};
/* Clocking */