summaryrefslogtreecommitdiff
path: root/arch/arm/include/asm/arch-ls102xa/config.h
diff options
context:
space:
mode:
authorTom Rini <trini@konsulko.com>2016-07-26 17:34:28 -0400
committerTom Rini <trini@konsulko.com>2016-07-26 17:34:28 -0400
commit9c7a0a600bfc8741e2941ce9bb965f2e77d6bbea (patch)
treea475756b966b614ad545299fa82dfd89c863aab8 /arch/arm/include/asm/arch-ls102xa/config.h
parentc3c9fd31bad80ead1682de917e27fa6073eae02b (diff)
parent8401c7103d73b4010df95bf8bc79a60f378f1e50 (diff)
downloadu-boot-imx-9c7a0a600bfc8741e2941ce9bb965f2e77d6bbea.zip
u-boot-imx-9c7a0a600bfc8741e2941ce9bb965f2e77d6bbea.tar.gz
u-boot-imx-9c7a0a600bfc8741e2941ce9bb965f2e77d6bbea.tar.bz2
Merge git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'arch/arm/include/asm/arch-ls102xa/config.h')
-rw-r--r--arch/arm/include/asm/arch-ls102xa/config.h9
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h
index 04abec4..d408fe4 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -10,7 +10,7 @@
#define CONFIG_SYS_CACHELINE_SIZE 64
#define OCRAM_BASE_ADDR 0x10000000
-#define OCRAM_SIZE 0x00020000
+#define OCRAM_SIZE 0x00010000
#define OCRAM_BASE_S_ADDR 0x10010000
#define OCRAM_S_SIZE 0x00010000
@@ -32,16 +32,15 @@
#define CONFIG_SYS_FSL_SERDES_ADDR (CONFIG_SYS_IMMR + 0x00ea0000)
#define CONFIG_SYS_FSL_GUTS_ADDR (CONFIG_SYS_IMMR + 0x00ee0000)
#define CONFIG_SYS_FSL_LS1_CLK_ADDR (CONFIG_SYS_IMMR + 0x00ee1000)
+#define CONFIG_SYS_FSL_RCPM_ADDR (CONFIG_SYS_IMMR + 0x00ee2000)
#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011c0500)
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011d0500)
#define CONFIG_SYS_DCU_ADDR (CONFIG_SYS_IMMR + 0x01ce0000)
-#define CONFIG_SYS_LS102XA_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000)
-#define CONFIG_SYS_LS102XA_USB1_ADDR \
- (CONFIG_SYS_IMMR + CONFIG_SYS_LS102XA_USB1_OFFSET)
+#define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000)
+#define CONFIG_SYS_EHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x07600000)
#define CONFIG_SYS_FSL_SEC_OFFSET 0x00700000
#define CONFIG_SYS_FSL_JR0_OFFSET 0x00710000
-#define CONFIG_SYS_LS102XA_USB1_OFFSET 0x07600000
#define CONFIG_SYS_TSEC1_OFFSET 0x01d10000
#define CONFIG_SYS_TSEC2_OFFSET 0x01d50000
#define CONFIG_SYS_TSEC3_OFFSET 0x01d90000