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| author | Sylvain Lemieux <slemieux@tycoint.com> | 2015-07-27 13:37:34 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-08-17 08:10:53 -0400 |
| commit | d75b532a9e81a918852a3378e769d07dbfd59f15 (patch) | |
| tree | c8bc2fd387032b8a5c48318d2c88a0d04bbaeca3 /arch/arm/include/asm/arch-lpc32xx/cpu.h | |
| parent | f0b38f2a41945b2bae2209f791e66500f3726c36 (diff) | |
| download | u-boot-imx-d75b532a9e81a918852a3378e769d07dbfd59f15.zip u-boot-imx-d75b532a9e81a918852a3378e769d07dbfd59f15.tar.gz u-boot-imx-d75b532a9e81a918852a3378e769d07dbfd59f15.tar.bz2 | |
arm: lpc32xx: mux: add missing registers
Add missing registers in struct definition.
Update GPIO MUX base register to match GPIO base (refer to "LPC32x0 User manual" Rev. 3 - 22 July 2011).
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Diffstat (limited to 'arch/arm/include/asm/arch-lpc32xx/cpu.h')
| -rw-r--r-- | arch/arm/include/asm/arch-lpc32xx/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-lpc32xx/cpu.h b/arch/arm/include/asm/arch-lpc32xx/cpu.h index 0b5dca1..0de894b 100644 --- a/arch/arm/include/asm/arch-lpc32xx/cpu.h +++ b/arch/arm/include/asm/arch-lpc32xx/cpu.h @@ -27,7 +27,7 @@ #define HS_UART7_BASE 0x4001C000 /* High speed UART 7 registers base */ #define RTC_BASE 0x40024000 /* RTC registers base */ #define GPIO_BASE 0x40028000 /* GPIO registers base */ -#define MUX_BASE 0x40028100 /* MUX registers base */ +#define MUX_BASE 0x40028000 /* MUX registers base */ #define WDT_BASE 0x4003C000 /* Watchdog timer registers base */ #define TIMER0_BASE 0x40044000 /* Timer0 registers base */ #define TIMER1_BASE 0x4004C000 /* Timer1 registers base */ |