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authorKhoronzhuk, Ivan <ivan.khoronzhuk@ti.com>2014-09-05 19:02:45 +0300
committerTom Rini <trini@ti.com>2014-10-23 11:27:04 -0400
commitafa479cf66dcc3e3648ff714d61995bf132d8ea9 (patch)
treece2d35bad9913105a6ad44175e072c20cc68ea6d /arch/arm/include/asm/arch-keystone
parent68e80fdda1336068f40915388bbdacfd2b75233a (diff)
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keystone2: keystone_nav: don't use hard addresses in qm_config
Use definitions in qm_config. The definitions can be set specifically for SoC, so there is no reason to check SoC type while initialization. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-keystone')
-rw-r--r--arch/arm/include/asm/arch-keystone/hardware.h13
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-keystone/hardware.h b/arch/arm/include/asm/arch-keystone/hardware.h
index 76e6441..ddc4be3 100644
--- a/arch/arm/include/asm/arch-keystone/hardware.h
+++ b/arch/arm/include/asm/arch-keystone/hardware.h
@@ -145,11 +145,20 @@ typedef volatile unsigned int *dv_reg_p;
#define KS2_EFUSE_BOOTROM (KS2_DEVICE_STATE_CTRL_BASE + 0xc90)
/* Queue manager */
-#define KS2_QM_MANAGER_BASE 0x02a02000
+#define KS2_QM_BASE_ADDRESS 0x23a80000
+#define KS2_QM_CONF_BASE 0x02a02000
#define KS2_QM_DESC_SETUP_BASE 0x02a03000
-#define KS2_QM_MANAGER_QUEUES_BASEi 0x02a80000
+#define KS2_QM_STATUS_RAM_BASE 0x02a06000
+#define KS2_QM_INTD_CONF_BASE 0x02a0c000
+#define KS2_QM_PDSP1_CMD_BASE 0x02a20000
+#define KS2_QM_PDSP1_CTRL_BASE 0x02a0f000
+#define KS2_QM_PDSP1_IRAM_BASE 0x02a10000
+#define KS2_QM_MANAGER_QUEUES_BASE 0x02a80000
#define KS2_QM_MANAGER_Q_PROXY_BASE 0x02ac0000
#define KS2_QM_QUEUE_STATUS_BASE 0x02a40000
+#define KS2_QM_LINK_RAM_BASE 0x00100000
+#define KS2_QM_REGION_NUM 64
+#define KS2_QM_QPOOL_NUM 4000
/* MSMC control */
#define KS2_MSMC_CTRL_BASE 0x0bc00000