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author | Aneesh Bansal <aneesh.bansal@freescale.com> | 2015-12-08 13:54:29 +0530 |
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committer | York Sun <yorksun@freescale.com> | 2015-12-15 08:57:35 +0800 |
commit | 9711f52806655bcfa28fe5594b91fed430beb72e (patch) | |
tree | 9e4f8aa76fd55c89cfd31c84c4ad9bc588b2d691 /arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | |
parent | e8f954a756a825130d11b9c8fca70101dd8b3ac5 (diff) | |
download | u-boot-imx-9711f52806655bcfa28fe5594b91fed430beb72e.zip u-boot-imx-9711f52806655bcfa28fe5594b91fed430beb72e.tar.gz u-boot-imx-9711f52806655bcfa28fe5594b91fed430beb72e.tar.bz2 |
armv8/ls1043ardb: add SECURE BOOT target for NOR
LS1043ARDB Secure Boot Target from NOR has been added.
- Configs defined to enable esbc_validate.
- ESBC Address in header is made 64 bit.
- SMMU is re-configured in Bypass mode.
Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h')
-rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index 83caa91..e7def3a 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -38,7 +38,7 @@ #define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_IMMR + 0x2600000) #define CONFIG_SYS_FSL_SEC_ADDR (CONFIG_SYS_IMMR + 0x700000) #define CONFIG_SYS_FSL_JR0_ADDR (CONFIG_SYS_IMMR + 0x710000) -#define CONFIG_SYS_SNVS_ADDR (CONFIG_SYS_IMMR + 0xe90000) +#define CONFIG_SYS_SEC_MON_ADDR (CONFIG_SYS_IMMR + 0xe90000) #define CONFIG_SYS_SFP_ADDR (CONFIG_SYS_IMMR + 0xe80200) #define CONFIG_SYS_FSL_TIMER_ADDR 0x02b00000 |