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author | York Sun <york.sun@nxp.com> | 2016-04-04 11:41:26 -0700 |
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committer | York Sun <york.sun@nxp.com> | 2016-04-06 10:26:46 -0700 |
commit | 3c1d218a1d3048fb576677c47eab43049d0b7778 (patch) | |
tree | fac5c6482522cef5563f368ee2777f4ed274759e /arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h | |
parent | 2a5558399828e24fce9e948288a88cd28887875e (diff) | |
download | u-boot-imx-3c1d218a1d3048fb576677c47eab43049d0b7778.zip u-boot-imx-3c1d218a1d3048fb576677c47eab43049d0b7778.tar.gz u-boot-imx-3c1d218a1d3048fb576677c47eab43049d0b7778.tar.bz2 |
armv8: LS2080A: Consolidate LS2080A and LS2085A
LS2080A is the primary SoC, and LS2085A is a personality with AIOP
and DPAA DDR. The RDB and QDS boards support both personality. By
detecting the SVR at runtime, a single image per board can support
both SoCs. It gives users flexibility to swtich SoC without the need
to reprogram the board.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h')
-rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h index d1fbde7..f71c2c1 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h @@ -9,7 +9,7 @@ #include <config.h> -#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A) +#ifdef CONFIG_LS2080A enum srds_prtcl { NONE = 0, PCIE1, |