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| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2016-12-09 16:09:00 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-01-18 09:29:08 -0800 |
| commit | 031acdbae89515371f794d01df819b490ff7ca9c (patch) | |
| tree | 6ce8549630686f35299191fe944d0b7d8e18e238 /arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h | |
| parent | 6424577b1bf1c7872baea42de174bc461de74b6b (diff) | |
| download | u-boot-imx-031acdbae89515371f794d01df819b490ff7ca9c.zip u-boot-imx-031acdbae89515371f794d01df819b490ff7ca9c.tar.gz u-boot-imx-031acdbae89515371f794d01df819b490ff7ca9c.tar.bz2 | |
armv8/fsl_lsch2: Add chip power supply voltage setup
Set up chip power supply voltage according to voltage ID.
The fuse status register provides the values from on-chip
voltage ID fuses programmed at the factory. These values
define the voltage requirements for the chip.
Main operations:
1. Set up the core voltage
2. Set up the SERDES voltage and reset SERDES lanes
3. Enable/disable DDR controller support 0.9V if needed
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h')
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h index 9f94b45..d9d948e 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h @@ -162,6 +162,14 @@ int is_serdes_prtcl_valid(int serdes, u32 prtcl); #ifdef CONFIG_FSL_LSCH2 const char *serdes_clock_to_string(u32 clock); int get_serdes_protocol(void); +#ifdef CONFIG_SYS_HAS_SERDES +/* Get the volt of SVDD in unit mV */ +int get_serdes_volt(void); +/* Set the volt of SVDD in unit mV */ +int set_serdes_volt(int svdd); +/* The target volt of SVDD in unit mV */ +int setup_serdes_volt(u32 svdd); +#endif #endif #endif /* __FSL_SERDES_H__ */ |