diff options
| author | Mingkai Hu <Mingkai.Hu@freescale.com> | 2015-11-11 17:58:34 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-11-30 09:11:10 -0800 |
| commit | af523a0d56b272bfd7d2a7ee4eccf07c7bb9529e (patch) | |
| tree | deb74cf668e12399f6fbf08a4e48434c6d3e3e85 /arch/arm/include/asm/arch-fsl-layerscape/config.h | |
| parent | 06b53010436bd7d4d0da6bdb2f505131a094abc6 (diff) | |
| download | u-boot-imx-af523a0d56b272bfd7d2a7ee4eccf07c7bb9529e.zip u-boot-imx-af523a0d56b272bfd7d2a7ee4eccf07c7bb9529e.tar.gz u-boot-imx-af523a0d56b272bfd7d2a7ee4eccf07c7bb9529e.tar.bz2 | |
pci/layerscape: add support for LS1043A PCIe LUT register access
The endian and base address of PEX LUT register region is different
between Chassis 2 and Chassis 3, so move the base address definition
to chassis specific header file and add pex_lut_* functions to access
LUT register.
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape/config.h')
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/config.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 82991d5..5ce916c 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -50,6 +50,7 @@ #define CONFIG_SYS_FSL_CCSR_SCFG_LE #define CONFIG_SYS_FSL_ESDHC_LE #define CONFIG_SYS_FSL_IFC_LE +#define CONFIG_SYS_FSL_PEX_LUT_LE #define CONFIG_SYS_MEMAC_LITTLE_ENDIAN @@ -119,6 +120,7 @@ #define CONFIG_SYS_FSL_WDOG_BE #define CONFIG_SYS_FSL_DSPI_BE #define CONFIG_SYS_FSL_QSPI_BE +#define CONFIG_SYS_FSL_PEX_LUT_BE #define QE_MURAM_SIZE 0x6000UL #define MAX_QE_RISC 1 |