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| author | Nagabhushana Netagunte <nagabhushana.netagunte@ti.com> | 2011-09-03 22:19:28 -0400 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-09-04 11:36:19 +0200 |
| commit | cf2c24e3996e49a26b449ab7daf843856b35b5c8 (patch) | |
| tree | 22d39b0c5e95b4249529c7f5675c842e9a71b8c7 /arch/arm/include/asm/arch-davinci/hardware.h | |
| parent | ac935e567bee77b39fc37c1ad360bb0d1ac07c4e (diff) | |
| download | u-boot-imx-cf2c24e3996e49a26b449ab7daf843856b35b5c8.zip u-boot-imx-cf2c24e3996e49a26b449ab7daf843856b35b5c8.tar.gz u-boot-imx-cf2c24e3996e49a26b449ab7daf843856b35b5c8.tar.bz2 | |
da850: add support to wake up DSP during board init
add support for DSP wake-up by default on DA850/OMAP-L138
during board initialization. Enable hwconfig environment and added
extra env setting through CONFIG_EXTRA_ENV_SETTINGS.
To prevent DSP from being woken up,set the environment variable as,
set hwconfig "dsp:wake=no"
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-davinci/hardware.h')
| -rw-r--r-- | arch/arm/include/asm/arch-davinci/hardware.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index 646e2ce..4a3af7d 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -153,7 +153,11 @@ typedef volatile unsigned int * dv_reg_p; #define DAVINCI_DDR_EMIF_DATA_BASE 0xc0000000 #define DAVINCI_INTC_BASE 0xfffee000 #define DAVINCI_BOOTCFG_BASE 0x01c14000 +#define DAVINCI_L3CBARAM_BASE 0x80000000 #define JTAG_ID_REG (DAVINCI_BOOTCFG_BASE + 0x18) +#define CHIP_REV_ID_REG (DAVINCI_BOOTCFG_BASE + 0x24) +#define HOST1CFG (DAVINCI_BOOTCFG_BASE + 0x44) +#define PSC0_MDCTL (DAVINCI_PSC0_BASE + 0xa00) #define GPIO_BANK2_REG_DIR_ADDR (DAVINCI_GPIO_BASE + 0x38) #define GPIO_BANK2_REG_OPDATA_ADDR (DAVINCI_GPIO_BASE + 0x3c) |