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author | Nikita Kiryanov <nikita@compulab.co.il> | 2014-10-29 19:28:33 +0200 |
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committer | Stefano Babic <sbabic@denx.de> | 2014-11-12 09:03:54 +0100 |
commit | f2863ff3f47c99c4b5ba00be572e3a2c4213c5a2 (patch) | |
tree | 24fbac07b3737bf73e53e3eb6fb7093676a5a188 /arch/arm/imx-common/spl.c | |
parent | 63f7af9a4cfb4a3b9136674c6612c6d13957c2cd (diff) | |
download | u-boot-imx-f2863ff3f47c99c4b5ba00be572e3a2c4213c5a2.zip u-boot-imx-f2863ff3f47c99c4b5ba00be572e3a2c4213c5a2.tar.gz u-boot-imx-f2863ff3f47c99c4b5ba00be572e3a2c4213c5a2.tar.bz2 |
arm: imx: make bmode command work with SPL/U-Boot combo
The bmode command forces the SoC to use a specific boot device
by writing its boot mode into SRC_GPR9, and notifying the SoC of
the change using SRC_GPR10[28] bit: if the bit is on, bootROM
uses the value in SRC_GPR9 instead of SRC_SMBR1 to determine
the boot device.
SPL on the other hand is oblivious to this distinction, so once
the bootROM loads SPL from the device configured in SRC_GPR10,
SPL will attempt to load U-Boot from the device configured in
SRC_SMBR1, which is not updated by the bootROM to the value in
SRC_GPR9.
The result is that the selected boot device is not used across all
the boot stages.
Update spl_boot_device() to look at gpr9 when necessary.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'arch/arm/imx-common/spl.c')
-rw-r--r-- | arch/arm/imx-common/spl.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c index 9d3c31a..477c38c 100644 --- a/arch/arm/imx-common/spl.c +++ b/arch/arm/imx-common/spl.c @@ -14,11 +14,12 @@ #include <spl.h> #if defined(CONFIG_MX6) -/* determine boot device from SRC_SBMR1 register (BOOT_CFG[4:1]) */ +/* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */ u32 spl_boot_device(void) { struct src *psrc = (struct src *)SRC_BASE_ADDR; - unsigned reg = readl(&psrc->sbmr1); + unsigned int gpr10_boot = readl(&psrc->gpr10) & (1 << 28); + unsigned reg = gpr10_boot ? readl(&psrc->gpr9) : readl(&psrc->sbmr1); /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */ switch ((reg & 0x000000FF) >> 4) { |