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authormaxims@google.com <maxims@google.com>2017-01-30 11:35:04 -0800
committerTom Rini <trini@konsulko.com>2017-02-08 15:56:30 -0500
commitd5ce3574619d6814ea095a798702e342d45203d4 (patch)
tree29505cad383e11e624d7fa6c94350344d29f3307 /arch/arm/dts
parente163a931af34ba06d11b98707b69b8819e353257 (diff)
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aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculation
Fix H-PLL and M-PLL rate calculation in ast2500 clock driver. Without this fix, valid setting can lead to division by zero when requesting the rate of H-PLL or M-PLL clocks. Signed-off-by: Maxim Sloyko <maxims@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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