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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-02-02 21:11:35 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-02-14 16:36:13 +0900 |
| commit | 9fbb2f7ec619d2a0e65cf36161b177e77138239e (patch) | |
| tree | 9d5f66aeba637a38977ecc9cd8797a4f6a133527 /arch/arm/dts | |
| parent | 233812a64274e80f1a7b291653fa9d341a326ebd (diff) | |
| download | u-boot-imx-9fbb2f7ec619d2a0e65cf36161b177e77138239e.zip u-boot-imx-9fbb2f7ec619d2a0e65cf36161b177e77138239e.tar.gz u-boot-imx-9fbb2f7ec619d2a0e65cf36161b177e77138239e.tar.bz2 | |
ARM: dts: uniphier: add device nodes for Peripheral control block
This block provides clock and reset control for peripherals such as
UART, I2C, IC card, etc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/dts')
| -rw-r--r-- | arch/arm/dts/uniphier-common32.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/dts/uniphier-ph1-ld4.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/dts/uniphier-ph1-pro4.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/dts/uniphier-ph1-pro5.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/dts/uniphier-ph1-sld8.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/dts/uniphier-proxstream2.dtsi | 6 |
6 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/dts/uniphier-common32.dtsi b/arch/arm/dts/uniphier-common32.dtsi index d3e5a74..43e5bea 100644 --- a/arch/arm/dts/uniphier-common32.dtsi +++ b/arch/arm/dts/uniphier-common32.dtsi @@ -74,6 +74,12 @@ reg = <0x58c00000 0x400>, <0x59800000 0x2000>; }; + peri: perictrl@59820000 { + /* specify compatible in each SoC DTSI */ + reg = <0x59820000 0x200>; + #clock-cells = <1>; + }; + timer@60000200 { compatible = "arm,cortex-a9-global-timer"; reg = <0x60000200 0x20>; diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi index 6bd4b91..5843097 100644 --- a/arch/arm/dts/uniphier-ph1-ld4.dtsi +++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi @@ -157,6 +157,12 @@ clock-frequency = <36864000>; }; +&peri { + compatible = "socionext,ph1-ld4-perictrl"; + clock-names = "uart", "i2c"; + clocks = <&sysctrl 3>, <&sysctrl 4>; +}; + &pinctrl { compatible = "socionext,ph1-ld4-pinctrl", "syscon"; }; diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi index 984f99c..0c2f02f 100644 --- a/arch/arm/dts/uniphier-ph1-pro4.dtsi +++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi @@ -197,6 +197,12 @@ clock-frequency = <73728000>; }; +&peri { + compatible = "socionext,ph1-pro4-perictrl"; + clock-names = "uart", "fi2c"; + clocks = <&sysctrl 3>, <&sysctrl 4>; +}; + &pinctrl { compatible = "socionext,ph1-pro4-pinctrl", "syscon"; }; diff --git a/arch/arm/dts/uniphier-ph1-pro5.dtsi b/arch/arm/dts/uniphier-ph1-pro5.dtsi index a836176..305114c 100644 --- a/arch/arm/dts/uniphier-ph1-pro5.dtsi +++ b/arch/arm/dts/uniphier-ph1-pro5.dtsi @@ -191,6 +191,12 @@ clock-frequency = <73728000>; }; +&peri { + compatible = "socionext,ph1-pro5-perictrl"; + clock-names = "uart", "fi2c"; + clocks = <&sysctrl 3>, <&sysctrl 4>; +}; + &pinctrl { compatible = "socionext,ph1-pro5-pinctrl", "syscon"; }; diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi index 9d97fb0..7a26b4a 100644 --- a/arch/arm/dts/uniphier-ph1-sld8.dtsi +++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi @@ -157,6 +157,12 @@ clock-frequency = <80000000>; }; +&peri { + compatible = "socionext,ph1-sld8-perictrl"; + clock-names = "uart", "i2c"; + clocks = <&sysctrl 3>, <&sysctrl 4>; +}; + &pinctrl { compatible = "socionext,ph1-sld8-pinctrl", "syscon"; }; diff --git a/arch/arm/dts/uniphier-proxstream2.dtsi b/arch/arm/dts/uniphier-proxstream2.dtsi index f6f4bbe..f2faf25 100644 --- a/arch/arm/dts/uniphier-proxstream2.dtsi +++ b/arch/arm/dts/uniphier-proxstream2.dtsi @@ -202,6 +202,12 @@ clock-frequency = <88900000>; }; +&peri { + compatible = "socionext,proxstream2-perictrl"; + clock-names = "uart", "fi2c"; + clocks = <&sysctrl 3>, <&sysctrl 4>; +}; + &pinctrl { compatible = "socionext,proxstream2-pinctrl", "syscon"; }; |