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| author | Andrew Gabbasov <andrew_gabbasov@mentor.com> | 2014-12-01 06:59:11 -0600 |
|---|---|---|
| committer | Pantelis Antoniou <pantelis.antoniou@konsulko.com> | 2014-12-12 21:08:38 +0200 |
| commit | 5af8f45cd049cf01790a17ff68e61303bc08abc3 (patch) | |
| tree | 63a22cbc7dfb04492a69327e52bf10ec8392d84b /arch/arm/dts/uniphier-ph1-sld8.dtsi | |
| parent | 201d5ac4388d66bf7a78e71c32939b3fc5779207 (diff) | |
| download | u-boot-imx-5af8f45cd049cf01790a17ff68e61303bc08abc3.zip u-boot-imx-5af8f45cd049cf01790a17ff68e61303bc08abc3.tar.gz u-boot-imx-5af8f45cd049cf01790a17ff68e61303bc08abc3.tar.bz2 | |
mmc: Fix block length for DDR mode
Block length for write and read commands is fixed to 512 bytes
when the card is in Dual Data Rate mode. If block length read from CSD
is different, make sure the driver will use correct length
in all further calculations and settings.
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Diffstat (limited to 'arch/arm/dts/uniphier-ph1-sld8.dtsi')
0 files changed, 0 insertions, 0 deletions