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| author | huang lin <hl@rock-chips.com> | 2015-11-17 14:20:18 +0800 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-12-01 08:07:22 -0700 |
| commit | 2bc00e016e4c1440f3004776e26357f46eb6690a (patch) | |
| tree | 89ef2b72bf20bc626459789684959d18c7bc27fe /arch/arm/dts/sun4i-a10-inet1.dts | |
| parent | c17736c02a5704cc48c9d48ce8f0c97e8a66924a (diff) | |
| download | u-boot-imx-2bc00e016e4c1440f3004776e26357f46eb6690a.zip u-boot-imx-2bc00e016e4c1440f3004776e26357f46eb6690a.tar.gz u-boot-imx-2bc00e016e4c1440f3004776e26357f46eb6690a.tar.bz2 | |
rockchip: rk3036: Add Soc reset driver
We can reset the Soc using some CRU (clock/reset unit) register.
Add support for this.
Signed-off-by: Lin Huang <hl@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/dts/sun4i-a10-inet1.dts')
0 files changed, 0 insertions, 0 deletions