summaryrefslogtreecommitdiff
path: root/arch/arm/dts/imx7d-sdb-qspi.dtsi
diff options
context:
space:
mode:
authorPeng Fan <peng.fan@nxp.com>2017-02-07 10:58:44 +0800
committerYe Li <ye.li@nxp.com>2017-04-05 17:22:47 +0800
commitd197ef2cd86db8350adf796ae9b77316830bdb75 (patch)
tree7b6f607817d9a6b97f775b52d1d4970852f2673a /arch/arm/dts/imx7d-sdb-qspi.dtsi
parentab2f9e136f5da034a8335dc8ca276a54367132e8 (diff)
downloadu-boot-imx-d197ef2cd86db8350adf796ae9b77316830bdb75.zip
u-boot-imx-d197ef2cd86db8350adf796ae9b77316830bdb75.tar.gz
u-boot-imx-d197ef2cd86db8350adf796ae9b77316830bdb75.tar.bz2
MLK-14418-9 imx: mx7dsabresd: add nand/qspi boot support
Add nand/qspi build configurations for their boot support. Also Add gpmi-nand and qspi specified DTS files for enable them. For QSPI, this patch changes it to use DM driver. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'arch/arm/dts/imx7d-sdb-qspi.dtsi')
-rw-r--r--arch/arm/dts/imx7d-sdb-qspi.dtsi44
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/dts/imx7d-sdb-qspi.dtsi b/arch/arm/dts/imx7d-sdb-qspi.dtsi
new file mode 100644
index 0000000..c684b56
--- /dev/null
+++ b/arch/arm/dts/imx7d-sdb-qspi.dtsi
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2015 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* disable epdc, conflict with qspi */
+&epdc {
+ status = "disabled";
+};
+
+&iomuxc {
+ qspi1 {
+ pinctrl_qspi1_1: qspi1grp_1 {
+ fsl,pins = <
+ MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x51
+ MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 0x51
+ MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 0x51
+ MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 0x51
+ MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK 0x51
+ MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B 0x51
+ >;
+ };
+ };
+};
+
+&qspi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_qspi1_1>;
+ status = "okay";
+ ddrsmp=<0>;
+
+ flash0: mx25l51245g@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-flash";
+ spi-max-frequency = <29000000>;
+ /* take off one dummy cycle */
+ spi-nor,ddr-quad-read-dummy = <5>;
+ reg = <0>;
+ };
+};