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| author | Moritz Fischer <moritz.fischer@ettus.com> | 2017-01-16 09:50:46 -0800 |
|---|---|---|
| committer | Heiko Schocher <hs@denx.de> | 2017-01-18 06:38:20 +0100 |
| commit | 08c11aaefb0a81ab53337068d0d21035055665d1 (patch) | |
| tree | 268da72259d10b288f633f2b85d136f5e2ea1d77 /arch/arm/dts/at91sam9g20.dtsi | |
| parent | 0ec0c5864365f3f222e1652aca98cfbd86bae890 (diff) | |
| download | u-boot-imx-08c11aaefb0a81ab53337068d0d21035055665d1.zip u-boot-imx-08c11aaefb0a81ab53337068d0d21035055665d1.tar.gz u-boot-imx-08c11aaefb0a81ab53337068d0d21035055665d1.tar.bz2 | |
i2c: i2c-cdns: Implement workaround for hold quirk of the rev 1.0
Revision 1.0 of this IP has a quirk where if during a long read transfer
the transfer_size register will go to 0, the master will send a NACK to
the slave prematurely.
The way to work around this is to reprogram the transfer_size register
mid-transfer when the only the receive fifo is known full, i.e. the I2C
bus is known non-active.
The workaround is based on the implementation in the linux-kernel.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: u-boot@lists.denx.de
Diffstat (limited to 'arch/arm/dts/at91sam9g20.dtsi')
0 files changed, 0 insertions, 0 deletions