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author | Michael Walle <[michael@walle.cc]> | 2011-10-31 20:22:58 +0530 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-11-03 22:56:22 +0100 |
commit | f779d739d67653c0d77f50cb18c315b2d39de075 (patch) | |
tree | 3b519a5d1450d1a69647f8d9c50e4eb7927f6b2f /arch/arm/cpu | |
parent | 8428a3991f3c76bcfd131288e28220338b1e58f3 (diff) | |
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kirkwood: define CONFIG_SYS_CACHELINE_SIZE
By default, on Kirkwood SoC DCache Lnd ICache line
lengths are 32 bytes long
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Diffstat (limited to 'arch/arm/cpu')
0 files changed, 0 insertions, 0 deletions