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| author | Bhupesh Sharma <bhupesh.sharma at freescale.com> | 2015-05-28 14:54:13 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-07-20 11:44:35 -0700 |
| commit | f299b5b0d244b7c4ef4820acb83fc562ff099413 (patch) | |
| tree | e1c787a9071b538a83780ff86875ccddb31706cd /arch/arm/cpu | |
| parent | dbe94dd11c241e4aa5cd3b04330dfa0d0f634d15 (diff) | |
| download | u-boot-imx-f299b5b0d244b7c4ef4820acb83fc562ff099413.zip u-boot-imx-f299b5b0d244b7c4ef4820acb83fc562ff099413.tar.gz u-boot-imx-f299b5b0d244b7c4ef4820acb83fc562ff099413.tar.bz2 | |
arm/errata: Update required bits for A57 cores erratas
This patch updates the setting of required bits for A57 cores erratas
- 828024 and 826974
Signed-off-by: Bhupesh Sharma <bhupesh.sharma at freescale.com>
Signed-off-by: Dai Haruki <dai.haruki at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv8/start.S | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index e5f2766..e70bed4 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -115,18 +115,18 @@ apply_a57_core_errata: #ifdef CONFIG_ARM_ERRATA_828024 mrs x0, S3_1_c15_c2_0 /* cpuactlr_el1 */ /* Disable non-allocate hint of w-b-n-a memory type */ - mov x0, #0x1 << 49 + orr x0, x0, #1 << 49 /* Disable write streaming no L1-allocate threshold */ - mov x0, #0x3 << 25 + orr x0, x0, #3 << 25 /* Disable write streaming no-allocate threshold */ - mov x0, #0x3 << 27 + orr x0, x0, #3 << 27 msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */ #endif #ifdef CONFIG_ARM_ERRATA_826974 mrs x0, S3_1_c15_c2_0 /* cpuactlr_el1 */ /* Disable speculative load execution ahead of a DMB */ - mov x0, #0x1 << 59 + orr x0, x0, #1 << 59 msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */ #endif |