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| author | Lubomir Popov <lpopov@mm-sol.com> | 2013-05-26 10:03:17 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-06-10 08:43:09 -0400 |
| commit | e0a8c99e6103a9052510ea9e2067c18cb688e1cb (patch) | |
| tree | 72c53d75d973cf3cf7315cc7afafc1b2f44abaaa /arch/arm/cpu | |
| parent | e69c585d76b7c8f422ad488ea92268c60dc2a436 (diff) | |
| download | u-boot-imx-e0a8c99e6103a9052510ea9e2067c18cb688e1cb.zip u-boot-imx-e0a8c99e6103a9052510ea9e2067c18cb688e1cb.tar.gz u-boot-imx-e0a8c99e6103a9052510ea9e2067c18cb688e1cb.tar.bz2 | |
OMAP5: Fix bug in omap5_es1_prcm struct
The newly introduced function setup_warmreset_time(), called
from within prcm_init(), tries to write to the prm_rsttime
OMAP5 register. The struct member holding this register's
address is however initialized for OMAP5 ES2.0 only. On ES1.0
devices this uninitialized value causes a second (warm) reset
at startup.
Add .prm_rsttime address init to the ES1.0 struct.
Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
Acked-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv7/omap5/prcm-regs.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c index 6bff8ae..5010739 100644 --- a/arch/arm/cpu/armv7/omap5/prcm-regs.c +++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c @@ -298,6 +298,7 @@ struct prcm_regs const omap5_es1_prcm = { .cm_wkupaon_io_srcomp_clkctrl = 0x4ae07898, .prm_rstctrl = 0x4ae07b00, .prm_rstst = 0x4ae07b04, + .prm_rsttime = 0x4ae07b08, .prm_vc_val_bypass = 0x4ae07ba0, .prm_vc_cfg_i2c_mode = 0x4ae07bb4, .prm_vc_cfg_i2c_clk = 0x4ae07bb8, |