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| author | Nishanth Menon <nm@ti.com> | 2015-08-13 09:50:58 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-08-28 12:33:12 -0400 |
| commit | c1ea3bece22da38c9aba3d7cd00e1720634add12 (patch) | |
| tree | 60b79d8dccb7cb1cdbf9c13608a82df7d5f65ead /arch/arm/cpu | |
| parent | 70d39f57146a6cb94736db39c770c3d95e07bedb (diff) | |
| download | u-boot-imx-c1ea3bece22da38c9aba3d7cd00e1720634add12.zip u-boot-imx-c1ea3bece22da38c9aba3d7cd00e1720634add12.tar.gz u-boot-imx-c1ea3bece22da38c9aba3d7cd00e1720634add12.tar.bz2 | |
ARM: DRA7: Add detection of ES2.0
Add support for detection of ES2.0 version of DRA7 family of
processors. ES2.0 is an incremental revision with various fixes
including the following:
- reset logic fixes
- few assymetric aging logic fixes
- MMC clock rate fixes
- Ethernet speed fixes
- edma fixes for mcasp
[ravibabu@ti.com: posted internal for an older bootloader]
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv7/omap5/hw_data.c | 2 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/omap5/hwinit.c | 3 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/omap5/sdram.c | 4 |
3 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index 33f92b7..a2d9cc8 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -684,6 +684,7 @@ void __weak hw_data_init(void) case DRA752_ES1_0: case DRA752_ES1_1: + case DRA752_ES2_0: *prcm = &dra7xx_prcm; *dplls_data = &dra7xx_dplls; *omap_vcores = &dra752_volts; @@ -719,6 +720,7 @@ void get_ioregs(const struct ctrl_ioregs **regs) break; case DRA752_ES1_0: case DRA752_ES1_1: + case DRA752_ES2_0: *regs = &ioregs_dra7xx_es1; break; case DRA722_ES1_0: diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c index 3699050..325a7e8 100644 --- a/arch/arm/cpu/armv7/omap5/hwinit.c +++ b/arch/arm/cpu/armv7/omap5/hwinit.c @@ -367,6 +367,9 @@ void init_omap_revision(void) case DRA752_CONTROL_ID_CODE_ES1_1: *omap_si_rev = DRA752_ES1_1; break; + case DRA752_CONTROL_ID_CODE_ES2_0: + *omap_si_rev = DRA752_ES2_0; + break; case DRA722_CONTROL_ID_CODE_ES1_0: *omap_si_rev = DRA722_ES1_0; break; diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c index cf4452d..a8d63c2 100644 --- a/arch/arm/cpu/armv7/omap5/sdram.c +++ b/arch/arm/cpu/armv7/omap5/sdram.c @@ -284,6 +284,7 @@ static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs) break; case DRA752_ES1_0: case DRA752_ES1_1: + case DRA752_ES2_0: switch (emif_nr) { case 1: *regs = &emif_1_regs_ddr3_532_mhz_1cs_dra_es1; @@ -316,6 +317,7 @@ static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs break; case DRA752_ES1_0: case DRA752_ES1_1: + case DRA752_ES2_0: *dmm_lisa_regs = &lisa_map_2G_x_2_x_2_2G_x_1_x_2; break; case DRA722_ES1_0: @@ -569,6 +571,7 @@ void __weak emif_get_ext_phy_ctrl_const_regs(u32 emif_nr, break; case DRA752_ES1_0: case DRA752_ES1_1: + case DRA752_ES2_0: if (emif_nr == 1) { *regs = dra_ddr3_ext_phy_ctrl_const_base_es1_emif1; *size = @@ -792,6 +795,7 @@ const struct read_write_regs *get_bug_regs(u32 *iterations) break; case DRA752_ES1_0: case DRA752_ES1_1: + case DRA752_ES2_0: case DRA722_ES1_0: bug_00339_regs_ptr = dra_bug_00339_regs; *iterations = sizeof(dra_bug_00339_regs)/ |