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authorHeiko Schocher <hs@denx.de>2011-09-14 19:44:02 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-09-30 22:00:58 +0200
commitbf569ac8d9b49b6bed39be4189bcdad4436cca1d (patch)
treec961dcb340ab374f513e22fbedd4b9d28227e3b2 /arch/arm/cpu
parentfbabac79d0e38cfc9506ab5537f815c2ed8c9cf4 (diff)
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arm, davinci: add internal WDT support for AM1808 cpus
Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/arm926ejs/davinci/timer.c31
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c b/arch/arm/cpu/arm926ejs/davinci/timer.c
index 2e7ba48..c7bf7a5 100644
--- a/arch/arm/cpu/arm926ejs/davinci/timer.c
+++ b/arch/arm/cpu/arm926ejs/davinci/timer.c
@@ -108,3 +108,34 @@ ulong get_tbclk(void)
{
return CONFIG_SYS_HZ;
}
+
+#ifdef CONFIG_HW_WATCHDOG
+static struct davinci_timer * const wdttimer =
+ (struct davinci_timer *)CONFIG_SYS_WDTTIMERBASE;
+
+/*
+ * See prufw2.pdf for using Timer as a WDT
+ */
+void davinci_hw_watchdog_enable(void)
+{
+ writel(0x0, &wdttimer->tcr);
+ writel(0x0, &wdttimer->tgcr);
+ /* TIMMODE = 2h */
+ writel(0x08 | 0x03 | ((TIM_CLK_DIV - 1) << 8), &wdttimer->tgcr);
+ writel(CONFIG_SYS_WDT_PERIOD_LOW, &wdttimer->prd12);
+ writel(CONFIG_SYS_WDT_PERIOD_HIGH, &wdttimer->prd34);
+ writel(2 << 22, &wdttimer->tcr);
+ writel(0x0, &wdttimer->tim12);
+ writel(0x0, &wdttimer->tim34);
+ /* set WDEN bit, WDKEY 0xa5c6 */
+ writel(0xa5c64000, &wdttimer->wdtcr);
+ /* clear counter register */
+ writel(0xda7e4000, &wdttimer->wdtcr);
+}
+
+void davinci_hw_watchdog_reset(void)
+{
+ writel(0xa5c64000, &wdttimer->wdtcr);
+ writel(0xda7e4000, &wdttimer->wdtcr);
+}
+#endif