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| author | Hans de Goede <hdegoede@redhat.com> | 2015-04-25 22:18:09 +0200 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2015-05-04 16:51:53 +0200 |
| commit | a536077def0295966452f290f7ce8f391e079966 (patch) | |
| tree | a6c0d74756e520837880e7f93b936ce5104e39c8 /arch/arm/cpu | |
| parent | 1d624a4f08d3a478e38ceb1a048c3da4982021df (diff) | |
| download | u-boot-imx-a536077def0295966452f290f7ce8f391e079966.zip u-boot-imx-a536077def0295966452f290f7ce8f391e079966.tar.gz u-boot-imx-a536077def0295966452f290f7ce8f391e079966.tar.bz2 | |
sunxi: axp: Add support for i2c based PMICs to the pmic-bus helpers
Add support for the axp152 and axp209 PMICs to the pmic register access
helpers. This is a preparation patch for moving the axp gpio code to a
separate gpio driver.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv7/sunxi/Makefile | 2 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/sunxi/pmic_bus.c | 35 |
2 files changed, 29 insertions, 8 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index 9a1eeec..f1b619b 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -27,6 +27,8 @@ obj-$(CONFIG_MACH_SUN7I) += clock_sun4i.o obj-$(CONFIG_MACH_SUN8I) += clock_sun6i.o obj-$(CONFIG_MACH_SUN9I) += clock_sun9i.o +obj-$(CONFIG_AXP152_POWER) += pmic_bus.o +obj-$(CONFIG_AXP209_POWER) += pmic_bus.o obj-$(CONFIG_AXP221_POWER) += pmic_bus.o ifndef CONFIG_SPL_BUILD diff --git a/arch/arm/cpu/armv7/sunxi/pmic_bus.c b/arch/arm/cpu/armv7/sunxi/pmic_bus.c index 389144b..9e05127 100644 --- a/arch/arm/cpu/armv7/sunxi/pmic_bus.c +++ b/arch/arm/cpu/armv7/sunxi/pmic_bus.c @@ -12,8 +12,13 @@ #include <common.h> #include <asm/arch/p2wi.h> #include <asm/arch/rsb.h> +#include <i2c.h> #include <asm/arch/pmic_bus.h> +#define AXP152_I2C_ADDR 0x30 + +#define AXP209_I2C_ADDR 0x34 + #define AXP221_CHIP_ADDR 0x68 #define AXP221_CTRL_ADDR 0x3e #define AXP221_INIT_DATA 0x3e @@ -25,24 +30,26 @@ int pmic_bus_init(void) { /* This cannot be 0 because it is used in SPL before BSS is ready */ static int needs_init = 1; - int ret; + __maybe_unused int ret; if (!needs_init) return 0; -#ifdef CONFIG_MACH_SUN6I +#ifdef CONFIG_AXP221_POWER +# ifdef CONFIG_MACH_SUN6I p2wi_init(); ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR, AXP221_INIT_DATA); -#else +# else ret = rsb_init(); if (ret) return ret; ret = rsb_set_device_address(AXP223_DEVICE_ADDR, AXP223_RUNTIME_ADDR); -#endif +# endif if (ret) return ret; +#endif needs_init = 0; return 0; @@ -50,19 +57,31 @@ int pmic_bus_init(void) int pmic_bus_read(u8 reg, u8 *data) { -#ifdef CONFIG_MACH_SUN6I +#ifdef CONFIG_AXP152_POWER + return i2c_read(AXP152_I2C_ADDR, reg, 1, data, 1); +#elif defined CONFIG_AXP209_POWER + return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1); +#elif defined CONFIG_AXP221_POWER +# ifdef CONFIG_MACH_SUN6I return p2wi_read(reg, data); -#else +# else return rsb_read(AXP223_RUNTIME_ADDR, reg, data); +# endif #endif } int pmic_bus_write(u8 reg, u8 data) { -#ifdef CONFIG_MACH_SUN6I +#ifdef CONFIG_AXP152_POWER + return i2c_write(AXP152_I2C_ADDR, reg, 1, &data, 1); +#elif defined CONFIG_AXP209_POWER + return i2c_write(AXP209_I2C_ADDR, reg, 1, &data, 1); +#elif defined CONFIG_AXP221_POWER +# ifdef CONFIG_MACH_SUN6I return p2wi_write(reg, data); -#else +# else return rsb_write(AXP223_RUNTIME_ADDR, reg, data); +# endif #endif } |