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authorFabio Estevam <fabio.estevam@freescale.com>2011-09-02 05:38:54 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-09-30 22:00:59 +0200
commit986d0d1bc53e95aac988c1d4737f35ce94a593ca (patch)
tree66657457e82789944aa39816d51b3344ce032ac9 /arch/arm/cpu
parent0a0522cbff152aaff786499363366b76de261a69 (diff)
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ARM: mx25: Print the silicon revison
Print the silicon revison during boot. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/arm926ejs/mx25/generic.c30
1 files changed, 29 insertions, 1 deletions
diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c
index 76e4b5c..21fe44f 100644
--- a/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -105,12 +105,40 @@ ulong imx_get_perclk (int clk)
return lldiv (fref, div);
}
+
+u32 get_cpu_rev(void)
+{
+ u32 srev;
+ u32 system_rev = 0x25000;
+
+ /* read SREV register from IIM module */
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+ srev = readl(&iim->iim_srev);
+
+ switch (srev) {
+ case 0x00:
+ system_rev |= CHIP_REV_1_0;
+ break;
+ case 0x01:
+ system_rev |= CHIP_REV_1_1;
+ break;
+ default:
+ system_rev |= 0x8000;
+ break;
+ }
+
+ return system_rev;
+}
+
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo (void)
{
char buf[32];
+ u32 cpurev = get_cpu_rev();
- printf ("CPU: Freescale i.MX25 at %s MHz\n\n",
+ printf("CPU: Freescale i.MX25 rev%d.%d%s at %s MHz\n\n",
+ (cpurev & 0xF0) >> 4, (cpurev & 0x0F),
+ ((cpurev & 0x8000) ? " unknown" : ""),
strmhz (buf, imx_get_armclk ()));
return 0;
}