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| author | Stefan Agner <stefan.agner@toradex.com> | 2016-11-15 10:38:23 -0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2016-11-29 16:59:37 +0100 |
| commit | 0405092bd21a44f5af22f17aeb0b82a0a11e1252 (patch) | |
| tree | b49af957e8eff15db2e6bab2f65b6f3576a73001 /arch/arm/cpu/u-boot-spl.lds | |
| parent | 792f186846672140deca7dfbf2f20aece26b5348 (diff) | |
| download | u-boot-imx-0405092bd21a44f5af22f17aeb0b82a0a11e1252.zip u-boot-imx-0405092bd21a44f5af22f17aeb0b82a0a11e1252.tar.gz u-boot-imx-0405092bd21a44f5af22f17aeb0b82a0a11e1252.tar.bz2 | |
arm: mx6: specify SPL padding
Specify standard padding for payload to 68KB. This is derived from
the maximum header size plus maximum SPL size. It matches the
already defined offset for SD/eMMC devices (69KB) too. This allows
to use the u-boot-with-spl.imx build target to generate a directly
flashable image which can be flashed using:
dd if=u-boot-with-spl.imx of=/dev/mmcblk0 bs=512 skip=2
While the patch has been created with SD/eMMC in mind, this also
works with other boot media. The board file needs to configure the
media specific (absolute) payload offset accordingly. Especially
the IVT offset is boot media specific and can be retrieved from the
reference manual (Table 8-25. Image Vector Table Offset and Initial
Load Region Size). For NAND boot a define like this should do the
job:
#define CONFIG_SYS_NAND_U_BOOT_OFFS (SPL_PAD_TO + 0x400)
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Diffstat (limited to 'arch/arm/cpu/u-boot-spl.lds')
0 files changed, 0 insertions, 0 deletions