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| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-02-21 16:43:19 +0100 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-02-21 16:43:19 +0100 |
| commit | 03268374db9133686b738acca212247023840ffc (patch) | |
| tree | c511f6501522c2e8cf02edc85024aeb5042e792a /arch/arm/cpu/tegra30-common | |
| parent | 9f024f62e4604274a23213dcee30016092e32e7b (diff) | |
| parent | 00ed34589880ca7092999ec5b92e061018d0fd0f (diff) | |
| download | u-boot-imx-03268374db9133686b738acca212247023840ffc.zip u-boot-imx-03268374db9133686b738acca212247023840ffc.tar.gz u-boot-imx-03268374db9133686b738acca212247023840ffc.tar.bz2 | |
Merge 'u-boot-microblaze/mainline/arm' into 'u-boot-arm/master'
This pulls the three following ZYNQ commits into ARM master:
7dca54f8: xilinx: zynq: Enable DCC and create new zynq_dcc board
59c651f4: arm: zynq: Add SLCR support with system reset
00ed3458: arm: zynq: Add lowlevel initialization to C
Diffstat (limited to 'arch/arm/cpu/tegra30-common')
0 files changed, 0 insertions, 0 deletions