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| author | Bhupesh Sharma <bhupesh.sharma@freescale.com> | 2015-03-19 09:20:43 -0700 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-04-21 10:26:29 -0700 |
| commit | 422cb08acb1bc9a05ffa68ba68b4e196dad1af5b (patch) | |
| tree | 1aae2fc085d1317f5ee6b9e26f44fffa5435be36 /arch/arm/cpu/armv8 | |
| parent | 1fb5ff9ae732d63c8810bd1a6922273e14329093 (diff) | |
| download | u-boot-imx-422cb08acb1bc9a05ffa68ba68b4e196dad1af5b.zip u-boot-imx-422cb08acb1bc9a05ffa68ba68b4e196dad1af5b.tar.gz u-boot-imx-422cb08acb1bc9a05ffa68ba68b4e196dad1af5b.tar.bz2 | |
armv8/fsl-lsch3: Add Freescale Debug Server driver
The Debug Server driver is responsible for loading the Debug
server FW on the Service Processor (Cortex-A5 core) on LS2085A like
SoCs and then polling for the successful initialization of the same.
TOP MEM HIDE is adjusted to ensure the space required by Debug Server
FW is accounted for. MC uses the DDR area which is calculated as:
MC DDR region start = Top of DDR - area reserved by Debug Server FW
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/arm/cpu/armv8')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-lsch3/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c index 4997487..618fbc2 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c @@ -10,6 +10,7 @@ #include <asm/armv8/mmu.h> #include <asm/io.h> #include <asm/arch-fsl-lsch3/immap_lsch3.h> +#include <fsl_debug_server.h> #include <fsl-mc/fsl_mc.h> #include "cpu.h" #include "mp.h" @@ -384,7 +385,6 @@ int cpu_eth_init(bd_t *bis) return error; } - int arch_early_init_r(void) { int rv; |