summaryrefslogtreecommitdiff
path: root/arch/arm/cpu/armv8
diff options
context:
space:
mode:
authorSriram Dash <sriram.dash@nxp.com>2016-06-13 09:58:35 +0530
committerMarek Vasut <marex@denx.de>2016-06-13 15:16:38 +0200
commit32fbd46f38ed183ae92aabc0a2abd7847bc3363e (patch)
tree85b94321b259c10ab4287f36c5e43bc514188781 /arch/arm/cpu/armv8
parent92623672f9d3f1b4ea12ae1e2bcc0ad9fde5d2cb (diff)
downloadu-boot-imx-32fbd46f38ed183ae92aabc0a2abd7847bc3363e.zip
u-boot-imx-32fbd46f38ed183ae92aabc0a2abd7847bc3363e.tar.gz
u-boot-imx-32fbd46f38ed183ae92aabc0a2abd7847bc3363e.tar.bz2
armv8/ls2080: Remove workaround for erratum A008751
This errata a008751 is applied on Soc specific file currently.This will be moved to a file where all the errata implementation will take place for usb for fsl. This patch removes the errata workaround from soc specific file for LS2080. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Diffstat (limited to 'arch/arm/cpu/armv8')
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/soc.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index dd633f3..d8ec426 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -124,15 +124,6 @@ void erratum_a009635(void)
}
#endif /* CONFIG_SYS_FSL_ERRATUM_A009635 */
-static void erratum_a008751(void)
-{
-#ifdef CONFIG_SYS_FSL_ERRATUM_A008751
- u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
-
- writel(0x27672b2a, scfg + SCFG_USB3PRM1CR / 4);
-#endif
-}
-
static void erratum_rcw_src(void)
{
#if defined(CONFIG_SPL)
@@ -189,7 +180,6 @@ void bypass_smmu(void)
}
void fsl_lsch3_early_init_f(void)
{
- erratum_a008751();
erratum_rcw_src();
init_early_memctl_regs(); /* tighten IFC timing */
erratum_a009203();