summaryrefslogtreecommitdiff
path: root/arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c
diff options
context:
space:
mode:
authorStephen Warren <swarren@nvidia.com>2016-10-19 15:18:46 -0600
committerTom Warren <twarren@nvidia.com>2016-11-07 14:36:29 -0800
commit1ab557a074aaa1927f7532489a1b75137e245b70 (patch)
tree7419c580b01cfad546a1014b85aabf0f93f097c6 /arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c
parentb9ae6415b6a099478c71fc3d410fc9a3776d7afa (diff)
downloadu-boot-imx-1ab557a074aaa1927f7532489a1b75137e245b70.zip
u-boot-imx-1ab557a074aaa1927f7532489a1b75137e245b70.tar.gz
u-boot-imx-1ab557a074aaa1927f7532489a1b75137e245b70.tar.bz2
armv8: add hooks for all cache-wide operations
SoC-specific logic may be required for all forms of cache-wide operations; invalidate and flush of both dcache and icache (note that only 3 of the 4 possible combinations make sense, since the icache never contains dirty lines). This patch adds an optional hook for all implemented cache-wide operations, and renames the one existing hook to better represent exactly which operation it is implementing. A dummy no-op implementation of each hook is provided. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c')
0 files changed, 0 insertions, 0 deletions