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| author | Mingkai Hu <Mingkai.Hu@freescale.com> | 2015-10-26 19:47:51 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-10-29 10:34:00 -0700 |
| commit | 8281c58fd46d095e28e60b2fb0ce84b4444896f8 (patch) | |
| tree | f2e2bc68eb6d3fdcd7cc99a3718602206477029c /arch/arm/cpu/armv8/fsl-layerscape/README.lsch2 | |
| parent | 9f3183d2d69f6d392fb943d249934f8648531e7e (diff) | |
| download | u-boot-imx-8281c58fd46d095e28e60b2fb0ce84b4444896f8.zip u-boot-imx-8281c58fd46d095e28e60b2fb0ce84b4444896f8.tar.gz u-boot-imx-8281c58fd46d095e28e60b2fb0ce84b4444896f8.tar.bz2 | |
armv8/fsl_lsch2: Add fsl_lsch2 SoC
Freescale LayerScape with Chassis Generation 2 is a set of SoCs with
ARMv8 cores and 2rd generation of Chassis.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-layerscape/README.lsch2')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/README.lsch2 | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/README.lsch2 b/arch/arm/cpu/armv8/fsl-layerscape/README.lsch2 new file mode 100644 index 0000000..a6ef830 --- /dev/null +++ b/arch/arm/cpu/armv8/fsl-layerscape/README.lsch2 @@ -0,0 +1,10 @@ +# +# Copyright 2015 Freescale Semiconductor +# +# SPDX-License-Identifier: GPL-2.0+ +# + +Freescale LayerScape with Chassis Generation 2 + +This architecture supports Freescale ARMv8 SoCs with Chassis generation 2, +for example LS1043A. |