diff options
| author | York Sun <yorksun@freescale.com> | 2015-01-06 13:18:42 -0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-02-24 13:08:46 -0800 |
| commit | dcd468b8f43c5077c42c75b15cf3204e6b6be46c (patch) | |
| tree | 2be7011207c86f70368e7372302366b2bb6e2770 /arch/arm/cpu/armv8/cache.S | |
| parent | 60385d94e56513b50b87724fb9a3878ee5086da9 (diff) | |
| download | u-boot-imx-dcd468b8f43c5077c42c75b15cf3204e6b6be46c.zip u-boot-imx-dcd468b8f43c5077c42c75b15cf3204e6b6be46c.tar.gz u-boot-imx-dcd468b8f43c5077c42c75b15cf3204e6b6be46c.tar.bz2 | |
armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stack
Flushing L3 cache in CCN-504 requries d-cache to be disabled. Using
assembly function to guarantee stack is not used before flushing is
completed. Timeout is needed for simualtor on which CCN-504 is not
implemented. Return value can be checked for timeout situation.
Change bootm.c to disable dcache instead of simply flushing, required
by flushing L3.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/arm/cpu/armv8/cache.S')
| -rw-r--r-- | arch/arm/cpu/armv8/cache.S | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S index 9c6e824..fa447bc 100644 --- a/arch/arm/cpu/armv8/cache.S +++ b/arch/arm/cpu/armv8/cache.S @@ -155,3 +155,9 @@ ENTRY(__asm_invalidate_icache_all) isb sy ret ENDPROC(__asm_invalidate_icache_all) + +ENTRY(__asm_flush_l3_cache) + mov x0, #0 /* return status as success */ + ret +ENDPROC(__asm_flush_l3_cache) + .weak __asm_flush_l3_cache |