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authorAlexander Graf <agraf@suse.de>2016-08-16 21:08:48 +0200
committerAlexander Graf <agraf@suse.de>2016-10-19 09:01:31 +0200
commit8069821fc2cb55a458efef1c4c614810302b6ab2 (patch)
tree51d5fdddc627a48c6055b8f2ab2a30a654d3a9fd /arch/arm/cpu/armv8/Kconfig
parent3ee655ed83ada67912cbbd14b6685bc0c7102553 (diff)
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arm: Provide common PSCI based reset handler
Most armv8 systems have PSCI support enabled in EL3, either through ARM Trusted Firmware or other firmware. On these systems, we do not need to implement system reset manually, but can instead rely on higher level firmware to deal with it. The exclude list seems excessive right now, but NXP is working on providing an in-tree PSCI implementation, so that all NXP systems can eventually use PSCI as well. Signed-off-by: Alexander Graf <agraf@suse.de> [agraf: fix meson] Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/cpu/armv8/Kconfig')
-rw-r--r--arch/arm/cpu/armv8/Kconfig18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
index 7e1fc4c..cd2d9bb 100644
--- a/arch/arm/cpu/armv8/Kconfig
+++ b/arch/arm/cpu/armv8/Kconfig
@@ -21,4 +21,22 @@ config ARMV8_SPIN_TABLE
- Reserve the code for the spin-table and the release address
via a /memreserve/ region in the Device Tree.
+config PSCI_RESET
+ bool "Use PSCI for reset and shutdown"
+ default y
+ depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && !TARGET_LS2080A_EMU && \
+ !TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \
+ !TARGET_LS2080ARDB && !TARGET_LS1012AQDS && \
+ !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \
+ !TARGET_LS1043ARDB && !ARCH_UNIPHIER && !ARCH_SNAPDRAGON && \
+ !TARGET_S32V234EVB
+ help
+ Most armv8 systems have PSCI support enabled in EL3, either through
+ ARM Trusted Firmware or other firmware.
+
+ On these systems, we do not need to implement system reset manually,
+ but can instead rely on higher level firmware to deal with it.
+
+ Select Y here to make use of PSCI calls for system reset
+
endif