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authorPaul Kocialkowski <contact@paulk.fr>2016-02-27 19:19:07 +0100
committerTom Rini <trini@konsulko.com>2016-03-15 15:12:53 -0400
commitfaec3f984120f1bee3f193c339f15c451b6d26e1 (patch)
tree1086bbfed5318b64d080812fe091acb017de677f /arch/arm/cpu/armv7
parente66782e6eae2b918bffd56d7146895f8ad1c00dc (diff)
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omap4: Reboot mode support
Reboot mode is written to SAR memory before reboot in the form of a string. This mechanism is supported on OMAP4 by various TI kernels. It is up to each board to make use of this mechanism or not. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Diffstat (limited to 'arch/arm/cpu/armv7')
-rw-r--r--arch/arm/cpu/armv7/omap4/boot.c41
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/omap4/boot.c b/arch/arm/cpu/armv7/omap4/boot.c
index 4b5aa77..bae49f4 100644
--- a/arch/arm/cpu/armv7/omap4/boot.c
+++ b/arch/arm/cpu/armv7/omap4/boot.c
@@ -58,3 +58,44 @@ u32 omap_sys_boot_device(void)
return boot_devices[sys_boot];
}
+
+int omap_reboot_mode(char *mode, unsigned int length)
+{
+ unsigned int limit;
+ unsigned int i;
+
+ if (length < 2)
+ return -1;
+
+ limit = (length < OMAP_REBOOT_REASON_SIZE) ? length :
+ OMAP_REBOOT_REASON_SIZE;
+
+ for (i = 0; i < (limit - 1); i++)
+ mode[i] = readb((u8 *)(OMAP44XX_SAR_RAM_BASE +
+ OMAP_REBOOT_REASON_OFFSET + i));
+
+ mode[i] = '\0';
+
+ return 0;
+}
+
+int omap_reboot_mode_clear(void)
+{
+ writeb(0, (u8 *)(OMAP44XX_SAR_RAM_BASE + OMAP_REBOOT_REASON_OFFSET));
+
+ return 0;
+}
+
+int omap_reboot_mode_store(char *mode)
+{
+ unsigned int i;
+
+ for (i = 0; i < (OMAP_REBOOT_REASON_SIZE - 1) && mode[i] != '\0'; i++)
+ writeb(mode[i], (u8 *)(OMAP44XX_SAR_RAM_BASE +
+ OMAP_REBOOT_REASON_OFFSET + i));
+
+ writeb('\0', (u8 *)(OMAP44XX_SAR_RAM_BASE +
+ OMAP_REBOOT_REASON_OFFSET + i));
+
+ return 0;
+}