diff options
author | Akshay Saraswat <akshay.s@samsung.com> | 2015-02-20 13:27:19 +0530 |
---|---|---|
committer | Minkyu Kang <mk7.kang@samsung.com> | 2015-02-28 18:03:46 +0900 |
commit | c8fd8e66cdd9bf8b4fe78eaaa9bc1000fa60ae85 (patch) | |
tree | 22219d85ae7922e4ac96f853924e619054bf2b70 /arch/arm/cpu/armv7 | |
parent | cecf2db23b256d84ed54e1442b646f07373e5caa (diff) | |
download | u-boot-imx-c8fd8e66cdd9bf8b4fe78eaaa9bc1000fa60ae85.zip u-boot-imx-c8fd8e66cdd9bf8b4fe78eaaa9bc1000fa60ae85.tar.gz u-boot-imx-c8fd8e66cdd9bf8b4fe78eaaa9bc1000fa60ae85.tar.bz2 |
Exynos542x: Make A7s boot with thumb-mode U-Boot on warm reset
On warm reset, all cores jump to the low_power_start function because iRAM
data is retained and because while executing iROM code all cores find
the jump flag 0x02020028 set. In low_power_start, cores check the reset
status and if true they clear the jump flag and jump back to 0x0.
The A7 cores do jump to 0x0 but consider following instructions as a Thumb
instructions which in turn makes them loop inside the iROM code instead of
jumping to power_down_core.
This issue is fixed by replacing the "mov pc" instruction with a "bx"
instruction which switches state along with the jump to make the execution
unit consider the branch target as an ARM instruction.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm/cpu/armv7')
-rw-r--r-- | arch/arm/cpu/armv7/exynos/lowlevel_init.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/exynos/lowlevel_init.c b/arch/arm/cpu/armv7/exynos/lowlevel_init.c index 782ecd1..329ab0c 100644 --- a/arch/arm/cpu/armv7/exynos/lowlevel_init.c +++ b/arch/arm/cpu/armv7/exynos/lowlevel_init.c @@ -103,7 +103,7 @@ static void low_power_start(void) reg_val = readl(EXYNOS5420_SPARE_BASE); if (reg_val != CPU_RST_FLAG_VAL) { writel(0x0, CONFIG_LOWPOWER_FLAG); - set_pc(0x0); + branch_bx(0x0); } reg_val = readl(CONFIG_PHY_IRAM_BASE + 0x4); |