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author | Tom Rini <trini@ti.com> | 2015-01-30 09:24:42 -0500 |
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committer | Tom Rini <trini@ti.com> | 2015-01-30 09:24:42 -0500 |
commit | 8e3da9dd113699eed2fa05fcde3c55a2ff410913 (patch) | |
tree | 4eb27bc3dc9f86e05dcd9f77eca18d0f061ee0a9 /arch/arm/cpu/armv7 | |
parent | 0f274f5376f02ccf30327bf3e5c88d26d3ea8827 (diff) | |
parent | 85df958ce267c602a4ec5f1e41f336c5a8d3b441 (diff) | |
download | u-boot-imx-8e3da9dd113699eed2fa05fcde3c55a2ff410913.zip u-boot-imx-8e3da9dd113699eed2fa05fcde3c55a2ff410913.tar.gz u-boot-imx-8e3da9dd113699eed2fa05fcde3c55a2ff410913.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-dm
Diffstat (limited to 'arch/arm/cpu/armv7')
-rw-r--r-- | arch/arm/cpu/armv7/exynos/pinmux.c | 27 |
1 files changed, 19 insertions, 8 deletions
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c index 94d0297..be43e22 100644 --- a/arch/arm/cpu/armv7/exynos/pinmux.c +++ b/arch/arm/cpu/armv7/exynos/pinmux.c @@ -266,22 +266,33 @@ static void exynos5_sromc_config(int flags) static void exynos5_i2c_config(int peripheral, int flags) { + int func01, func23; + + /* High-Speed I2C */ + if (flags & PINMUX_FLAG_HS_MODE) { + func01 = 4; + func23 = 4; + } else { + func01 = 2; + func23 = 3; + } + switch (peripheral) { case PERIPH_ID_I2C0: - gpio_cfg_pin(EXYNOS5_GPIO_B30, S5P_GPIO_FUNC(0x2)); - gpio_cfg_pin(EXYNOS5_GPIO_B31, S5P_GPIO_FUNC(0x2)); + gpio_cfg_pin(EXYNOS5_GPIO_B30, S5P_GPIO_FUNC(func01)); + gpio_cfg_pin(EXYNOS5_GPIO_B31, S5P_GPIO_FUNC(func01)); break; case PERIPH_ID_I2C1: - gpio_cfg_pin(EXYNOS5_GPIO_B32, S5P_GPIO_FUNC(0x2)); - gpio_cfg_pin(EXYNOS5_GPIO_B33, S5P_GPIO_FUNC(0x2)); + gpio_cfg_pin(EXYNOS5_GPIO_B32, S5P_GPIO_FUNC(func01)); + gpio_cfg_pin(EXYNOS5_GPIO_B33, S5P_GPIO_FUNC(func01)); break; case PERIPH_ID_I2C2: - gpio_cfg_pin(EXYNOS5_GPIO_A06, S5P_GPIO_FUNC(0x3)); - gpio_cfg_pin(EXYNOS5_GPIO_A07, S5P_GPIO_FUNC(0x3)); + gpio_cfg_pin(EXYNOS5_GPIO_A06, S5P_GPIO_FUNC(func23)); + gpio_cfg_pin(EXYNOS5_GPIO_A07, S5P_GPIO_FUNC(func23)); break; case PERIPH_ID_I2C3: - gpio_cfg_pin(EXYNOS5_GPIO_A12, S5P_GPIO_FUNC(0x3)); - gpio_cfg_pin(EXYNOS5_GPIO_A13, S5P_GPIO_FUNC(0x3)); + gpio_cfg_pin(EXYNOS5_GPIO_A12, S5P_GPIO_FUNC(func23)); + gpio_cfg_pin(EXYNOS5_GPIO_A13, S5P_GPIO_FUNC(func23)); break; case PERIPH_ID_I2C4: gpio_cfg_pin(EXYNOS5_GPIO_A20, S5P_GPIO_FUNC(0x3)); |