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authorVitaly Andrianov <vitalya@ti.com>2015-02-11 14:07:58 -0500
committerTom Rini <trini@ti.com>2015-02-16 12:41:41 -0500
commit66c98a0c3807720a32ce49c9ba2a5808555062d7 (patch)
treef529bcd2aad0df100e358b6555885027a33868f8 /arch/arm/cpu/armv7
parentbba379d498b4ed408e79f7aec6dc23a3572c37e7 (diff)
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keystone2: ddr3: eliminate using global ddr3_size variable
KS2 ddr3 initialization uses ddr3_size global variable before u-boot relocation. Even if the variable is not being used after relocation, writing to it corrupts relocation table. This patch removes the global ddr3_size variable and uses local one instead. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Tested-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7')
-rw-r--r--arch/arm/cpu/armv7/keystone/ddr3.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv7/keystone/ddr3.c b/arch/arm/cpu/armv7/keystone/ddr3.c
index 923906a..dfb27b5 100644
--- a/arch/arm/cpu/armv7/keystone/ddr3.c
+++ b/arch/arm/cpu/armv7/keystone/ddr3.c
@@ -263,17 +263,14 @@ static void ddr3_map_ecc_cic2_irq(u32 base)
}
#endif
-void ddr3_init_ecc(u32 base)
+void ddr3_init_ecc(u32 base, u32 ddr3_size)
{
- u32 ddr3_size;
-
if (!ddr3_ecc_support_rmw(base)) {
ddr3_disable_ecc(base);
return;
}
ddr3_ecc_init_range(base);
- ddr3_size = ddr3_get_size();
ddr3_reset_data(CONFIG_SYS_SDRAM_BASE, ddr3_size);
/* mapping DDR3 ECC system interrupt from CIC2 to GIC */