diff options
author | Peng Fan <peng.fan@nxp.com> | 2017-02-22 16:21:53 +0800 |
---|---|---|
committer | Ye Li <ye.li@nxp.com> | 2017-04-05 17:23:52 +0800 |
commit | 245854f657c092783507a572337765f2f3c44724 (patch) | |
tree | 8401467ea50633d7936113ebeb2ae4530bf95afc /arch/arm/cpu/armv7 | |
parent | 0921d1c3d60594e584bdfc16c3777913b0de9a5f (diff) | |
download | u-boot-imx-245854f657c092783507a572337765f2f3c44724.zip u-boot-imx-245854f657c092783507a572337765f2f3c44724.tar.gz u-boot-imx-245854f657c092783507a572337765f2f3c44724.tar.bz2 |
mx7ulp: Add HAB boot support
Add CAAM clock functions, SEC_CONFIG[1] fuse checking, and default CSF
size for HAB support boot on mx7ulp.
Users need to uncomment the CONFIG_SECURE_BOOT in mx7ulp_evk.h to build
secure uboot.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/cpu/armv7')
-rw-r--r-- | arch/arm/cpu/armv7/mx7ulp/clock.c | 10 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/mx7ulp/soc.c | 8 |
2 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx7ulp/clock.c b/arch/arm/cpu/armv7/mx7ulp/clock.c index 1c072b8..77b282a 100644 --- a/arch/arm/cpu/armv7/mx7ulp/clock.c +++ b/arch/arm/cpu/armv7/mx7ulp/clock.c @@ -313,6 +313,16 @@ void clock_init(void) enable_usboh3_clk(1); } +#ifdef CONFIG_SECURE_BOOT +void hab_caam_clock_enable(unsigned char enable) +{ + if (enable) + pcc_clock_enable(PER_CLK_CAAM, true); + else + pcc_clock_enable(PER_CLK_CAAM, false); +} +#endif + /* * Dump some core clockes. */ diff --git a/arch/arm/cpu/armv7/mx7ulp/soc.c b/arch/arm/cpu/armv7/mx7ulp/soc.c index 8713e9b..4fd4c3a 100644 --- a/arch/arm/cpu/armv7/mx7ulp/soc.c +++ b/arch/arm/cpu/armv7/mx7ulp/soc.c @@ -7,9 +7,17 @@ #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> #include <asm/arch/sys_proto.h> +#include <asm/imx-common/hab.h> static char *get_reset_cause(char *); +#if defined(CONFIG_SECURE_BOOT) +struct imx_sec_config_fuse_t const imx_sec_config_fuse = { + .bank = 29, + .word = 6, +}; +#endif + u32 get_cpu_rev(void) { /* Temporally hard code the CPU rev to 0x73, rev 1.0. Fix it later */ |