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| author | Bo Shen <voice.shen@atmel.com> | 2014-12-15 13:24:34 +0800 |
|---|---|---|
| committer | Andreas Bießmann <andreas.devel@googlemail.com> | 2015-02-07 23:42:49 +0100 |
| commit | 09f5c9745b15ea6ab008092ace6f01f7b108c79d (patch) | |
| tree | 4e93f9a3dfdfd62e0b01d258ee1cdad4485ec9ba /arch/arm/cpu/armv7 | |
| parent | 5c756bbc9dd9c59bdf1a60159081c0f25fd0cb0b (diff) | |
| download | u-boot-imx-09f5c9745b15ea6ab008092ace6f01f7b108c79d.zip u-boot-imx-09f5c9745b15ea6ab008092ace6f01f7b108c79d.tar.gz u-boot-imx-09f5c9745b15ea6ab008092ace6f01f7b108c79d.tar.bz2 | |
ARM: atmel: sama5d4: add bus matrix init function
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Diffstat (limited to 'arch/arm/cpu/armv7')
| -rw-r--r-- | arch/arm/cpu/armv7/at91/sama5d4_devices.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/at91/sama5d4_devices.c b/arch/arm/cpu/armv7/at91/sama5d4_devices.c index 7469825..9c63e99 100644 --- a/arch/arm/cpu/armv7/at91/sama5d4_devices.c +++ b/arch/arm/cpu/armv7/at91/sama5d4_devices.c @@ -10,6 +10,7 @@ #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/clk.h> +#include <asm/arch/sama5_matrix.h> #include <asm/arch/sama5d4.h> char *get_cpu_name() @@ -44,3 +45,37 @@ void at91_udp_hw_init(void) at91_periph_clk_enable(ATMEL_ID_UDPHS); } #endif + +#ifdef CONFIG_SPL_BUILD +void matrix_init(void) +{ + struct atmel_matrix *h64mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX0; + struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1; + int i; + + /* Disable the write protect */ + writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr); + writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr); + + /* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */ + for (i = 4; i <= 10; i++) { + writel(0x000f0f0f, &h64mx->ssr[i]); + writel(0x0000ffff, &h64mx->sassr[i]); + writel(0x0000000f, &h64mx->srtsr[i]); + } + + /* CS3 */ + writel(0x00c0c0c0, &h32mx->ssr[3]); + writel(0xff000000, &h32mx->sassr[3]); + writel(0xff000000, &h32mx->srtsr[3]); + + /* NFC SRAM */ + writel(0x00010101, &h32mx->ssr[4]); + writel(0x00000001, &h32mx->sassr[4]); + writel(0x00000001, &h32mx->srtsr[4]); + + /* Enable the write protect */ + writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr); + writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr); +} +#endif |