diff options
| author | Michal Simek <michal.simek@xilinx.com> | 2013-08-28 07:36:31 +0200 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-09-23 16:26:32 +0200 |
| commit | 7ba69b7dcc94879f9dfe6beb3416512114556c04 (patch) | |
| tree | 880b4abb27ccb3090e496bd0651829539ae55f57 /arch/arm/cpu/armv7/zynq/timer.c | |
| parent | 373d79839451de08c3dce9231a133178378c4590 (diff) | |
| download | u-boot-imx-7ba69b7dcc94879f9dfe6beb3416512114556c04.zip u-boot-imx-7ba69b7dcc94879f9dfe6beb3416512114556c04.tar.gz u-boot-imx-7ba69b7dcc94879f9dfe6beb3416512114556c04.tar.bz2 | |
arm: zynq: Fix timer loadaddress
Reload address was written to the counter register
instead of load register.
The problem happens when timer expires but never
reload to ~0UL (it is downcount timer).
Reported-by: Stephen MacMahon <stephenm@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/cpu/armv7/zynq/timer.c')
| -rw-r--r-- | arch/arm/cpu/armv7/zynq/timer.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/zynq/timer.c b/arch/arm/cpu/armv7/zynq/timer.c index 0133565..3b8d949 100644 --- a/arch/arm/cpu/armv7/zynq/timer.c +++ b/arch/arm/cpu/armv7/zynq/timer.c @@ -57,7 +57,7 @@ int timer_init(void) SCUTIMER_CONTROL_ENABLE_MASK; /* Load the timer counter register */ - writel(0xFFFFFFFF, &timer_base->counter); + writel(0xFFFFFFFF, &timer_base->load); /* * Start the A9Timer device |