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| author | Nitin Garg <nitin.garg@freescale.com> | 2015-03-31 20:37:36 -0500 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2015-03-31 22:54:34 -0500 |
| commit | 91cc8ace0fde6c5b65243b0b9a3d80b958c84864 (patch) | |
| tree | 1669a8ece160bbd529f50bd5fbad827bef77c566 /arch/arm/cpu/armv7/start.S | |
| parent | 34242c4b01ce256fb57b888d17697bf8ca79288e (diff) | |
| download | u-boot-imx-91cc8ace0fde6c5b65243b0b9a3d80b958c84864.zip u-boot-imx-91cc8ace0fde6c5b65243b0b9a3d80b958c84864.tar.gz u-boot-imx-91cc8ace0fde6c5b65243b0b9a3d80b958c84864.tar.bz2 | |
MLK-10524: iMX6x: Implement workaround for Cortex-A9 errata 845369
Under very rare timing circumstances, transitioning into streaming
mode might create a data corruption. Present on Two or more processors
or 1 core with ACP, all revisions. This erratum can be worked round
by setting bit[22] of the undocumented Diagnostic Control Register to 1.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
(cherry picked from commit 70ad44e523680de67dd8b7a7505d7f27799980ee)
Diffstat (limited to 'arch/arm/cpu/armv7/start.S')
| -rw-r--r-- | arch/arm/cpu/armv7/start.S | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 27be451..aec92b3 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -227,6 +227,11 @@ ENTRY(cpu_init_cp15) orr r0, r0, #1 << 21 @ set bit #21 mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register #endif +#ifdef CONFIG_ARM_ERRATA_845369 + mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register + orr r0, r0, #1 << 22 @ set bit #22 + mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register +#endif mov pc, lr @ back to my caller ENDPROC(cpu_init_cp15) |