diff options
author | Tom Rini <trini@ti.com> | 2014-02-17 14:22:02 -0500 |
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committer | Tom Rini <trini@ti.com> | 2014-02-17 14:22:02 -0500 |
commit | c4d376fd1c2bce8d64cec0431dd3f24957b6dec4 (patch) | |
tree | de17e3a67fa4a48f3b9571bff2399cb0a24558bc /arch/arm/cpu/armv7/omap-common | |
parent | b1ad03c242dae3712b9be66026f5d8c6f919c00b (diff) | |
parent | 5e77a745b24d9b98aa635293972f04fd6f0c6b38 (diff) | |
download | u-boot-imx-c4d376fd1c2bce8d64cec0431dd3f24957b6dec4.zip u-boot-imx-c4d376fd1c2bce8d64cec0431dd3f24957b6dec4.tar.gz u-boot-imx-c4d376fd1c2bce8d64cec0431dd3f24957b6dec4.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'arch/arm/cpu/armv7/omap-common')
-rw-r--r-- | arch/arm/cpu/armv7/omap-common/clocks-common.c | 53 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap-common/emif-common.c | 5 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap-common/hwinit-common.c | 6 |
3 files changed, 2 insertions, 62 deletions
diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c index dfa3760..8e7411d 100644 --- a/arch/arm/cpu/armv7/omap-common/clocks-common.c +++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c @@ -418,55 +418,6 @@ static void setup_dplls(void) #endif } -#ifdef CONFIG_SYS_CLOCKS_ENABLE_ALL -static void setup_non_essential_dplls(void) -{ - u32 abe_ref_clk; - const struct dpll_params *params; - - /* IVA */ - clrsetbits_le32((*prcm)->cm_bypclk_dpll_iva, - CM_BYPCLK_DPLL_IVA_CLKSEL_MASK, DPLL_IVA_CLKSEL_CORE_X2_DIV_2); - - params = get_iva_dpll_params(*dplls_data); - do_setup_dpll((*prcm)->cm_clkmode_dpll_iva, params, DPLL_LOCK, "iva"); - - /* Configure ABE dpll */ - params = get_abe_dpll_params(*dplls_data); -#ifdef CONFIG_SYS_OMAP_ABE_SYSCK - abe_ref_clk = CM_ABE_PLL_REF_CLKSEL_CLKSEL_SYSCLK; - - if (omap_revision() == DRA752_ES1_0) - /* Select the sys clk for dpll_abe */ - clrsetbits_le32((*prcm)->cm_abe_pll_sys_clksel, - CM_CLKSEL_ABE_PLL_SYS_CLKSEL_MASK, - CM_ABE_PLL_SYS_CLKSEL_SYSCLK2); -#else - abe_ref_clk = CM_ABE_PLL_REF_CLKSEL_CLKSEL_32KCLK; - /* - * We need to enable some additional options to achieve - * 196.608MHz from 32768 Hz - */ - setbits_le32((*prcm)->cm_clkmode_dpll_abe, - CM_CLKMODE_DPLL_DRIFTGUARD_EN_MASK| - CM_CLKMODE_DPLL_RELOCK_RAMP_EN_MASK| - CM_CLKMODE_DPLL_LPMODE_EN_MASK| - CM_CLKMODE_DPLL_REGM4XEN_MASK); - /* Spend 4 REFCLK cycles at each stage */ - clrsetbits_le32((*prcm)->cm_clkmode_dpll_abe, - CM_CLKMODE_DPLL_RAMP_RATE_MASK, - 1 << CM_CLKMODE_DPLL_RAMP_RATE_SHIFT); -#endif - - /* Select the right reference clk */ - clrsetbits_le32((*prcm)->cm_abe_pll_ref_clksel, - CM_ABE_PLL_REF_CLKSEL_CLKSEL_MASK, - abe_ref_clk << CM_ABE_PLL_REF_CLKSEL_CLKSEL_SHIFT); - /* Lock the dpll */ - do_setup_dpll((*prcm)->cm_clkmode_dpll_abe, params, DPLL_LOCK, "abe"); -} -#endif - u32 get_offset_code(u32 volt_offset, struct pmic_data *pmic) { u32 offset_code; @@ -760,10 +711,6 @@ void prcm_init(void) timer_init(); scale_vcores(*omap_vcores); setup_dplls(); -#ifdef CONFIG_SYS_CLOCKS_ENABLE_ALL - setup_non_essential_dplls(); - enable_non_essential_clocks(); -#endif setup_warmreset_time(); break; default: diff --git a/arch/arm/cpu/armv7/omap-common/emif-common.c b/arch/arm/cpu/armv7/omap-common/emif-common.c index cd6289b..429c4be 100644 --- a/arch/arm/cpu/armv7/omap-common/emif-common.c +++ b/arch/arm/cpu/armv7/omap-common/emif-common.c @@ -179,8 +179,7 @@ void emif_update_timings(u32 base, const struct emif_regs *regs) writel(regs->temp_alert_config, &emif->emif_temp_alert_config); writel(regs->emif_ddr_phy_ctlr_1, &emif->emif_ddr_phy_ctrl_1_shdw); - if ((omap_revision() >= OMAP5430_ES1_0) || - (omap_revision() == DRA752_ES1_0)) { + if ((omap_revision() >= OMAP5430_ES1_0) || is_dra7xx()) { writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_5_LL_0, &emif->emif_l3_config); } else if (omap_revision() >= OMAP4460_ES1_0) { @@ -309,7 +308,7 @@ static void ddr3_init(u32 base, const struct emif_regs *regs) * The same sequence should work on OMAP5432 as well. But strange that * it is not working */ - if (omap_revision() == DRA752_ES1_0) { + if (is_dra7xx()) { do_ext_phy_settings(base, regs); writel(regs->sdram_config2, &emif->emif_lpddr2_nvm_config); writel(regs->sdram_config_init, &emif->emif_sdram_config); diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c b/arch/arm/cpu/armv7/omap-common/hwinit-common.c index 85d3754..bf29510 100644 --- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c +++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c @@ -43,16 +43,10 @@ static void set_mux_conf_regs(void) set_muxconf_regs_essential(); break; case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL: -#ifdef CONFIG_SYS_ENABLE_PADS_ALL - set_muxconf_regs_non_essential(); -#endif break; case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR: case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH: set_muxconf_regs_essential(); -#ifdef CONFIG_SYS_ENABLE_PADS_ALL - set_muxconf_regs_non_essential(); -#endif break; } } |