ENGR00325255 pcie:enable pcie support on imx6sx sd

Enable pcie support in uboot on imx6sx sd boards
- enable_pcie_clock should be call before ssp_en is set,
  since that ssp_en control the phy_ref clk gate, turn on
  it after the source of the pcie clks are stable.
- add debug info
- add rx_eq of gpr12 on imx6sx
- there are random link down issue on imx6sx. It's
  pcie ep reset issue.
  solution:reset ep, then retry link can fix it.

(cherry picked from commit ec78595a24b5ff1020baa97b6d6e79a3a3326307)
Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 81fd30250110d72992758f08b66c07306126892b)

1 files changed, 10 insertions, 0 deletions

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 5e77d29..0a97f0d 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -406,6 +406,16 @@ void vadc_power_down(void)
 	val &= ~IMX6SX_GPR5_CSI1_MUX_CTRL_MASK,
 	writel(val, &iomux->gpr[5]);
 }
+
+void pcie_power_up(void)
+{
+	set_ldo_voltage(LDO_PU, 1100);	/* Set VDDPU to 1.1V */
+}
+
+void pcie_power_off(void)
+{
+	set_ldo_voltage(LDO_PU, 0);	/* Set VDDPU to 1.1V */
+}
 #endif
 
 static void set_uart_from_osc(void)