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| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-01-06 08:49:58 +0100 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-01-06 08:49:58 +0100 |
| commit | a891601ce51edbafa1a2750c96a618e4fcbca1c2 (patch) | |
| tree | 9a5d44eb1fcca45dfd30557318f786b66392a8f3 /arch/arm/cpu/armv7/mx6/clock.c | |
| parent | 2931fa4db349c97f882ffda42e901208654b5ca9 (diff) | |
| parent | 4611d5bab26f93471b84f6f33967cef69b3f723a (diff) | |
| download | u-boot-imx-a891601ce51edbafa1a2750c96a618e4fcbca1c2.zip u-boot-imx-a891601ce51edbafa1a2750c96a618e4fcbca1c2.tar.gz u-boot-imx-a891601ce51edbafa1a2750c96a618e4fcbca1c2.tar.bz2 | |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Conflicts:
include/micrel.h
The conflict above was trivial, caused by four lines being
added in both branches with different whitepace.
Diffstat (limited to 'arch/arm/cpu/armv7/mx6/clock.c')
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/clock.c | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index 873d9d0..fcc4f35 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -94,7 +94,7 @@ static u32 decode_pll(enum pll_clocks pll, u32 infreq) div = __raw_readl(&imx_ccm->analog_pll_enet); div &= BM_ANADIG_PLL_ENET_DIV_SELECT; - return (div == 3 ? 125000000 : 25000000 * (div << 1)); + return 25000000 * (div + (div >> 1) + 1); default: return 0; } @@ -310,7 +310,18 @@ static u32 get_mmdc_ch0_clk(void) return freq / (podf + 1); } +#else +static u32 get_mmdc_ch0_clk(void) +{ + u32 cbcdr = __raw_readl(&imx_ccm->cbcdr); + u32 mmdc_ch0_podf = (cbcdr & MXC_CCM_CBCDR_MMDC_CH0_PODF_MASK) >> + MXC_CCM_CBCDR_MMDC_CH0_PODF_OFFSET; + + return get_periph_clk() / (mmdc_ch0_podf + 1); +} +#endif +#ifdef CONFIG_FEC_MXC int enable_fec_anatop_clock(void) { u32 reg = 0; @@ -339,16 +350,6 @@ int enable_fec_anatop_clock(void) return 0; } - -#else -static u32 get_mmdc_ch0_clk(void) -{ - u32 cbcdr = __raw_readl(&imx_ccm->cbcdr); - u32 mmdc_ch0_podf = (cbcdr & MXC_CCM_CBCDR_MMDC_CH0_PODF_MASK) >> - MXC_CCM_CBCDR_MMDC_CH0_PODF_OFFSET; - - return get_periph_clk() / (mmdc_ch0_podf + 1); -} #endif static u32 get_usdhc_clk(u32 port) |