diff options
author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-04-21 21:01:35 +0200 |
---|---|---|
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-04-21 21:01:35 +0200 |
commit | c9aab0f9dd23fddcebf5984dc19e62b514e759a7 (patch) | |
tree | 65ce91815907466f07e87d8b79eaf19763c282bf /arch/arm/cpu/armv7/keystone/init.c | |
parent | 94b972d366c29b92319865e3ded16da062aa8507 (diff) | |
parent | 2e8f5dc16ad360cc15ea402a1dc4d421a04adbbd (diff) | |
download | u-boot-imx-c9aab0f9dd23fddcebf5984dc19e62b514e759a7.zip u-boot-imx-c9aab0f9dd23fddcebf5984dc19e62b514e759a7.tar.gz u-boot-imx-c9aab0f9dd23fddcebf5984dc19e62b514e759a7.tar.bz2 |
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Diffstat (limited to 'arch/arm/cpu/armv7/keystone/init.c')
-rw-r--r-- | arch/arm/cpu/armv7/keystone/init.c | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/keystone/init.c b/arch/arm/cpu/armv7/keystone/init.c new file mode 100644 index 0000000..044015a --- /dev/null +++ b/arch/arm/cpu/armv7/keystone/init.c @@ -0,0 +1,56 @@ +/* + * Keystone2: Architecture initialization + * + * (C) Copyright 2012-2014 + * Texas Instruments Incorporated, <www.ti.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/hardware.h> + +void chip_configuration_unlock(void) +{ + __raw_writel(KEYSTONE_KICK0_MAGIC, KEYSTONE_KICK0); + __raw_writel(KEYSTONE_KICK1_MAGIC, KEYSTONE_KICK1); +} + +int arch_cpu_init(void) +{ + chip_configuration_unlock(); + icache_enable(); + +#ifdef CONFIG_SOC_K2HK + share_all_segments(8); + share_all_segments(9); + share_all_segments(10); /* QM PDSP */ + share_all_segments(11); /* PCIE */ +#endif + + return 0; +} + +void reset_cpu(ulong addr) +{ + volatile u32 *rstctrl = (volatile u32 *)(KS2_RSTCTRL); + u32 tmp; + + tmp = *rstctrl & KS2_RSTCTRL_MASK; + *rstctrl = tmp | KS2_RSTCTRL_KEY; + + *rstctrl &= KS2_RSTCTRL_SWRST; + + for (;;) + ; +} + +void enable_caches(void) +{ +#ifndef CONFIG_SYS_DCACHE_OFF + /* Enable D-cache. I-cache is already enabled in start.S */ + dcache_enable(); +#endif +} |