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| author | Doug Anderson <dianders@chromium.org> | 2014-05-26 19:19:05 +0530 |
|---|---|---|
| committer | Minkyu Kang <mk7.kang@samsung.com> | 2014-06-13 17:05:13 +0900 |
| commit | c9334fcda90652e2f8c49f4517b728ebc6f5f623 (patch) | |
| tree | 01c206183af51fdf71d60cac58d6bc456a476c36 /arch/arm/cpu/armv7/exynos/exynos5_setup.h | |
| parent | aacdd79095b0a7c258a76e4fdfc133af16b07dc0 (diff) | |
| download | u-boot-imx-c9334fcda90652e2f8c49f4517b728ebc6f5f623.zip u-boot-imx-c9334fcda90652e2f8c49f4517b728ebc6f5f623.tar.gz u-boot-imx-c9334fcda90652e2f8c49f4517b728ebc6f5f623.tar.bz2 | |
DMC: exynos5420: Gate CLKM to when reading PHY_CON13
when CLKM is running. If we stop CLKM when sampling it the glitches
all go away, so we'll do that as per Samsung suggestion.
We also check the "is it locked" bits of PHY_CON13 and loop until they
show the the value sampled actually represents a locked value. It
doesn't appear that the glitching and "is it locked" are related, but
it seems wise to wait until the PHY tells us the value is good before
we use it. In practice we will not loop more than a couple times (and
usually won't loop at all).
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm/cpu/armv7/exynos/exynos5_setup.h')
| -rw-r--r-- | arch/arm/cpu/armv7/exynos/exynos5_setup.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/exynos/exynos5_setup.h b/arch/arm/cpu/armv7/exynos/exynos5_setup.h index 314d6f4..d415c91 100644 --- a/arch/arm/cpu/armv7/exynos/exynos5_setup.h +++ b/arch/arm/cpu/armv7/exynos/exynos5_setup.h @@ -284,6 +284,7 @@ #define CTRL_DLL_ON (1 << 5) #define CTRL_FORCE_MASK (0x7F << 8) #define CTRL_LOCK_COARSE_MASK (0x7F << 10) +#define CTRL_FINE_LOCKED 0x7 #define CTRL_OFFSETD_RESET_VAL 0x8 #define CTRL_OFFSETD_VAL 0x7F |