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| author | Vaibhav Hiremath <hvaibhav@ti.com> | 2012-03-08 17:15:47 +0530 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2012-10-25 11:30:22 -0700 |
| commit | 000820b5835c2b8b863af992b66dc973dc4bd202 (patch) | |
| tree | f6abab9e0b1e696f8a21a8e7defbf6bd0fae0ee6 /arch/arm/cpu/armv7/am33xx/clock.c | |
| parent | 3530a35d747508e98976a1d86a6d3f9b31cb3fd2 (diff) | |
| download | u-boot-imx-000820b5835c2b8b863af992b66dc973dc4bd202.zip u-boot-imx-000820b5835c2b8b863af992b66dc973dc4bd202.tar.gz u-boot-imx-000820b5835c2b8b863af992b66dc973dc4bd202.tar.bz2 | |
am335x: Enable RTC 32K OSC clock
In order to support low power state, you must source kernel system
timers to persistent clock, available across suspend/resume. In case of
AM335x device, the only source we have is, RTC32K, available in
wakeup/always-on domain. Having said that, during validation it has
been observed that, RTC clock need couple of seconds delay to stabilize
the RTC OSC clock; and such a huge delay is not acceptable in kernel
especially during early init and also it will impact quick/fast boot
use-cases.
So, RTC32k OSC enable dependency has been shifted to
SPL/first-bootloader.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/am33xx/clock.c')
| -rw-r--r-- | arch/arm/cpu/armv7/am33xx/clock.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..f870859 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -44,6 +44,7 @@ const struct cm_perpll *cmper = (struct cm_perpll *)CM_PER; const struct cm_wkuppll *cmwkup = (struct cm_wkuppll *)CM_WKUP; const struct cm_dpll *cmdpll = (struct cm_dpll *)CM_DPLL; +const struct cm_rtc *cmrtc = (struct cm_rtc *)CM_RTC; static void enable_interface_clocks(void) { @@ -153,6 +154,11 @@ static void enable_per_clocks(void) writel(PRCM_MOD_EN, &cmper->spi0clkctrl); while (readl(&cmper->spi0clkctrl) != PRCM_MOD_EN) ; + + /* RTC */ + writel(PRCM_MOD_EN, &cmrtc->rtcclkctrl); + while (readl(&cmrtc->rtcclkctrl) != PRCM_MOD_EN) + ; } static void mpu_pll_config(void) |