From 000820b5835c2b8b863af992b66dc973dc4bd202 Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Thu, 8 Mar 2012 17:15:47 +0530 Subject: am335x: Enable RTC 32K OSC clock In order to support low power state, you must source kernel system timers to persistent clock, available across suspend/resume. In case of AM335x device, the only source we have is, RTC32K, available in wakeup/always-on domain. Having said that, during validation it has been observed that, RTC clock need couple of seconds delay to stabilize the RTC OSC clock; and such a huge delay is not acceptable in kernel especially during early init and also it will impact quick/fast boot use-cases. So, RTC32k OSC enable dependency has been shifted to SPL/first-bootloader. Signed-off-by: Vaibhav Hiremath Signed-off-by: Tom Rini --- arch/arm/cpu/armv7/am33xx/clock.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/cpu/armv7/am33xx/clock.c') diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index 2b19506..f870859 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -44,6 +44,7 @@ const struct cm_perpll *cmper = (struct cm_perpll *)CM_PER; const struct cm_wkuppll *cmwkup = (struct cm_wkuppll *)CM_WKUP; const struct cm_dpll *cmdpll = (struct cm_dpll *)CM_DPLL; +const struct cm_rtc *cmrtc = (struct cm_rtc *)CM_RTC; static void enable_interface_clocks(void) { @@ -153,6 +154,11 @@ static void enable_per_clocks(void) writel(PRCM_MOD_EN, &cmper->spi0clkctrl); while (readl(&cmper->spi0clkctrl) != PRCM_MOD_EN) ; + + /* RTC */ + writel(PRCM_MOD_EN, &cmrtc->rtcclkctrl); + while (readl(&cmrtc->rtcclkctrl) != PRCM_MOD_EN) + ; } static void mpu_pll_config(void) -- cgit v1.1